Method of manufacturing trench type semiconductor device

1. A method of manufacturing a trench type semiconductor device, comprising:

forming an epitaxial layer on a substrate;

forming a trench in the epitaxial layer;

forming a gate structure in the trench, wherein the gate structure comprises an upper gate, a lower gate and an intermediate insulating portion, and the intermediate insulating portion is located in and above the upper gate;

depositing a first oxide layer in the trench;

depositing a first polysilicon layer on the first oxide layer and in the trench, wherein a thickness of the first oxide layer is about 2000 angstroms (Å) to 3000 angstroms, and a thickness of the first polysilicon layer is about 3000 angstroms to 8000 angstroms and fills up the trench;

etching back the first polysilicon layer until lower than an upper surface of the first oxide layer about 0.7 microns to 1.2 microns;

etching back the first oxide layer until lower than an upper surface of the first polysilicon layer about 1000 angstroms to 1500 angstroms to form a first dielectric layer;

oxidizing surfaces of the epitaxial layer and the first polysilicon layer to form a gate oxide layer, and enclosing the lower gate by the gate oxide layer and the first dielectric layer;

depositing a second polysilicon layer to fill up the trench;

etching back the second polysilicon layer until lower than an upper surface of the gate oxide layer about 1000 angstroms to 1500 angstroms;

depositing a second oxide layer;

blanket etching back the second oxide layer to form spacers on an upper surface of the second polysilicon layer in the trench; and

self-aligned etching the second polysilicon layer to form the upper gate with the spacers as an mask.

2. The method of manufacturing a trench type semiconductor device of claim 1 , further comprising:

depositing a third oxide layer; and

etching back the third oxide layer and the spacers to form the intermediate insulating portion, wherein the intermediate insulating portion, the gate oxide layer and the first dielectric layer enclose the upper gate.

3. The method of manufacturing a trench type semiconductor device of claim 2 , further comprising:

implanting ions into the epitaxial layer and driving in the ions by heating;

utilizing a source mask to define a source region;

forming a second dielectric layer on the gate oxide layer;

etching the second dielectric layer and the gate oxide layer with a contact mask to form a plurality of openings; and

depositing a metal layer on the second dielectric layer and in the openings.