IP Library Granted Patent US 11,462,496
Granted Patent B2
US 11,462,496 · App. 16/952,205 · Granted Oct 4, 2022

Semiconductor device

Inventor: Masayoshi Tagami (Kuwana, JP)
Assignee: Kioxia Corporation
H01L24/08H01L23/5226H01L24/05H01L24/83H01L25/18H01L27/11582H01L2224/0557H01L2224/05557H01L2224/05647H01L2224/05655H01L2224/0807H01L2224/08059H01L2224/08148H01L2224/80203H01L2224/83203H01L2224/83896
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Quick Facts
Patent No.
US 11,462,496
App. No.
16/952,205
Granted
Oct 4, 2022
Kind
B2
Abstract

In one embodiment, a semiconductor device includes a first chip including a substrate, a first plug on the substrate, and a first pad on the first plug, and a second chip including a second plug and a second pad under the second plug. The second chip includes an electrode layer electrically connected to the second plug, a charge storage layer provided on a side face of the electrode layer via a first insulator, and a semiconductor layer provided on a side face of the charge storage layer via a second insulator. The first and second pads are bonded with each other, and the first and second plugs are disposed so that at least a portion of the first plug and at least a portion of the second plug do not overlap with each other in a first direction that is perpendicular to a surface of the substrate.

Claims (24)

1. A semiconductor device comprising:

a first chip including:

a substrate,

a first interconnect layer provided above the substrate,

a first pad provided above the first interconnect layer, and

a first plug extending in a first direction crossing a surface of the substrate and connecting the first interconnect layer and the first pad; and

a second chip including:

a second interconnect layer,

a second pad provided under the second interconnect layer,

a second plug extending in the first direction and connecting the second interconnect layer and the second pad, and

a memory cell array electrically connected to the second interconnect layer, wherein

the first plug does not overlap with the second plug in the first direction,

the first pad includes a first portion overlapping with the first plug in the first direction, and a second portion other than the first portion,

the second pad includes a third portion overlapping with the second plug in the first direction, and a fourth portion other than the third portion,

the first portion of the first pad is all bonded with the second pad,

the third portion of the second pad is all bonded with the first pad,

the second portion of the first pad is not bonded with the second pad, and

the fourth portion of the second pad is not bonded with the first pad.

2. The device of claim 1 , wherein

a material of the first plug is identical with a material of the first pad and different from a material of the first interconnect layer, and

a material of the second plug is identical with a material of the second pad and different from a material of the second interconnect layer.

3. The device of claim 1 , wherein

the first portion is provided on an upper face of the first pad and projects toward the second pad, and

the second portion is provided on a lower face of the second pad and projects toward the first pad.

Assignments (1)
CHANGE OF NAME Recorded Feb 10, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 059004/0001 →
Priority Claims (1)
JP JP2018-040790 · Mar 7, 2018 · national
Continuity (2)
Continuation 16126034 · Sep 10, 2018
Related Publication 20210074658A1 · Mar 11, 2021