Structure for blocking noise in at least one designated band and electronic device comprising same
An electronic device according to various embodiments may include a housing, an antenna structure positioned in the housing, and a wireless communication circuit. The antenna structure may include a first conductive layer including a first opening, a second conductive layer positioned in parallel with the first conductive layer, and including a second opening which overlaps at least in part with the first opening when the first conductive layer is seen from above, a third conductive layer positioned in parallel with the first conductive layer and interposed between the first conductive layer and the second conductive layer, a first insulating layer interposed between the first conductive layer and the third conductive layer, a second insulating layer interposed between the second conductive layer and the third conductive layer, a first conductive plate electrically separated from the first conductive layer and disposed within the first opening, a second conductive plate electrically separated from the second conductive layer and disposed within the second opening, a first conductive via electrically coupled between the first conductive plate and the third conductive layer through the first insulating layer, and a second conductive via electrically coupled between the second conductive plate and the third conductive layer through the second insulating layer. The wireless communication circuit may be configured to transmit or receive a signal having a frequency between 3 Giga Hertz (GHz) and 100 GHz and is electrically coupled to the antenna structure. Various embodiments may be possible.
1. A Printed Circuit Board (PCB) comprising:
an insulating layer;
a first conductive layer disposed on the insulating layer and comprising a ground area and a plurality of openings, the plurality of openings filled with an insulating material, disposed within the ground area, the ground area surrounding the plurality of openings;
a second conductive layer disposed under the insulating layer and configured to apply voltage;
a plurality of conductive via pads surrounded by respective ones of the plurality of openings; and
a plurality of conductive vias disposed in the insulating layer, and configured to electrically couple the respective ones of the plurality of conductive via pads and the second conductive layer,
wherein the plurality of conductive via pads are electrically separated from the ground area, by the respective ones of the plurality of openings; and
wherein the ground area of the first conductive layer is electrically separated from the second conductive layer.
2. The PCB of claim 1 , wherein the first conductive layer, the second conductive layer, and the insulating layer are positioned in parallel with each other.
3. The PCB of claim 1 , wherein a distance between the plurality of conductive via pads and the second conductive layer corresponds to a distance between the first conductive layer and the second conductive layer.
4. The PCB of claim 1 , wherein the voltage is applied to at least one conductive via of the plurality of conductive vias and at least one conductive via pads of the plurality of conductive via pads.
5. The PCB of claim 4 , wherein the at least one conductive via pad of the plurality of conductive via pads to which the voltage is applied and the ground area serve to form a capacitive element.
6. The PCB of claim 5 , further comprising a first chip, wherein the capacitive element is used to decrease noise included in a signal transmitted from the first chip to a second chip differentiated from the first chip.
7. The PCB of claim 6 , wherein the signal is related to a mmWave band.
8. The PCB of claim 1 , wherein a shape of the plurality of openings corresponds to a shape of the respective ones of the plurality of conductive via pad.