Array substrate with optical dielectric layer and display panel
View Patent ↗An array substrate and a display panel are provided. The display panel includes the array substrate including a substrate, a driving circuit layer, a planarization layer, a reflective layer, an optical dielectric layer, a black light-shielding layer, a first electrode layer, and a pixel defining layer.
1. An array substrate, comprising:
a substrate;
a driving circuit layer, wherein the driving circuit layer is provided with a plurality of thin film transistor (TFT) units, and each of the TFT units is provided with a drain;
a planarization layer disposed on the driving circuit layer;
a reflective layer disposed on the planarization layer, wherein the reflective layer comprises a plurality of reflective units, and each of the reflective units corresponds to one of the TFT units;
an optical dielectric layer disposed on the reflective layer;
a black light-shielding layer disposed on the planarization layer, wherein the black light-shielding layer comprises a plurality of black light-shielding units, and the black light-shielding units and the reflective units are alternately disposed with each other;
a first electrode layer disposed on the optical dielectric layer, wherein the first electrode layer comprises a plurality of anodes, and each of the anodes corresponds to the reflective layer and the drain, and passes through a through hole to connect to the drain; and
a pixel defining layer disposed on the black light-shielding units, wherein the pixel defining layer comprises a plurality of pixel defining units, and two adjacent pixel defining units define a pixel defining notch, one pixel defining notch is provided with two blue pixel units stacked on each other.
2. The array substrate of claim 1 , wherein a material of the pixel defining layer and a material of the black light-shielding layer are same.
3. The array substrate of claim 1 , wherein a bottom of the through hole is the drain, and the through hole sequentially penetrates the planarization layer, the reflective layer, and the optical dielectric layer from bottom to top.
4. The array substrate of claim 1 , wherein a material of the reflective layer comprises an alloy comprising one or more of Ag, Al, Mg, and Ti.
5. The array substrate of claim 1 , wherein a material of the optical dielectric layer comprises any one of TiOx, NbOx, ZnOx, CeOx, TaOx, MoOx, SiNx, ITO, IZO, ZnSx, or ZnSex.
6. The array substrate of claim 1 , wherein a depth of the pixel defining notch ranges from 1 μm to 3 μm.
7. The display panel of claim 1 , wherein a bottom of the through hole is the drain, and the through sequentially penetrates the planarization layer and one of the black light-shielding units from bottom to top.
8. A display panel, comprising:
an array substrate, comprising:
a substrate;
a driving circuit layer, wherein the driving circuit layer is provided with a plurality of thin film transistor (TFT) units, and each of the TFT units is provided with a drain;
a planarization layer disposed on the driving circuit layer;
a reflective layer disposed on the planarization layer, wherein the reflective layer comprises a plurality of reflective units, and each of the reflective units corresponds to one of the TFT units;
an optical dielectric layer disposed on the reflective layer;
a black light-shielding layer disposed on the planarization layer, wherein the black light-shielding layer comprises a plurality of black light-shielding units, and the black light-shielding units and the reflective units are alternately disposed with each other;
a first electrode layer disposed on the optical dielectric layer, wherein the first electrode layer comprises a plurality of anodes, and each of the anodes corresponds to the reflective layer and the drain, and passes through a through hole to connect to the drain; and
a pixel defining layer disposed on the black light-shielding units, wherein the pixel defining layer comprises a plurality of pixel defining units, and two adjacent pixel defining units define a pixel defining notch, one pixel defining notch is provided with two blue pixel units stacked on each other;
an organic luminescent layer disposed on the array substrate, wherein the organic luminescent layer comprises a plurality of red pixel units, a plurality of green pixel units, and a plurality of blue pixel units;
a second electrode layer disposed on the organic luminescent layer;
a light extraction layer disposed on the second electrode layer;
a sacrificial protective layer disposed on the light extraction layer; and an encapsulation layer disposed on the sacrificial protective layer.
9. The display panel of claim 8 , wherein a refractivity of a material of the organic luminescent layer is smaller than a refractivity of a material of the optical dielectric material.
10. The display panel of claim 8 , wherein an optical path length LR from centers of the red pixel units to the reflective layer is represented by:
L
R
=
2
m
+
1
4
λ
R
;
an optical path length LG from centers of the green pixel units to the reflective layer is represented by:
L
G
=
2
m
+
1
4
λ
G
;
an optical path length LB from centers of the blue pixel units to the reflective layer is represented by:
L
B
=
2
m
+
1
4
λ
B
;
and
wherein m is an integer, and λR, λG, and λB are respectively wavelengths of red light, green light, and blue light.