IP Library › Granted Patent US 11,975,198
Granted Patent B2
US 11,975,198 · App. 16/962,749 · Granted May 7, 2024

Nerve stimulator and manufacturing method thereof

Inventors: Jiawei Yang (Hangzhou, CN); Nhan Tran (Hangzhou, CN); Xuyan Yang (Hangzhou, CN)
Assignee: HANGZHOU NANOCHAP ELECTRONICS CO., LTD.
A61N1/36125A61N1/0476A61N1/0543B23K26/38C03C27/02H05K1/0306H05K1/11
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Quick Facts
Patent No.
US 11,975,198
App. No.
16/962,749
Granted
May 7, 2024
Kind
B2
Abstract

A nerve stimulator and a manufacturing method thereof. The nerve stimulator includes a glass substrate, and a plurality of metal pins provided on the substrate, wherein the metal pins form stimulation portions on one side of the substrate, and the density of the metal pins is greater than 15 Pin/mm 2 . The stimulation portions in the present nerve stimulator have a high density and a good stimulation effect. The processing method thereof is to cut out a high-density metal pin array first by using a metal underlayer, then the manufacturing method overcomes the deficiency in the prior art that it is rather difficult to manufacture a high density of nerve stimulation electrodes by using other substrates such as ceramics and the like.

Claims (5)

1. A nerve stimulator, comprising a substrate, a plurality of metal pins on the substrate, wherein the metal pins run through the substrate from a first side of the substrate to a second side of the substrate and protrude from the first side to form stimulation portions, the substrate is made of a glass material, and a pad structure made of a metal material on the glass substrate.

2. The nerve stimulator according to claim 1 , wherein a density of the metal pins is greater than 15 Pin/mm 2 .

3. The nerve stimulator according to claim 1 , wherein a height of the stimulation portions is 1 μm to 100 μm.

4. The nerve stimulator according to claim 1 , wherein the pad structure is provided on the substrate on the second side opposite to the stimulation portions.

5. The nerve stimulator according to claim 1 , wherein a processing chip is connected onto the substrate, and the processing chip and the substrate are connected through flip-chip bonding.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2020
From: YANG, JIAWEI; TRAN, NHAN; YANG, XUYAN
To: HANGZHOU NANOCHAP ELECTRONICS CO., LTD.
Reel/Frame 053232/0255 →
Priority Claims (1)
CN 201810043984.X · Jan 17, 2018 · national
Continuity (1)
Related Publication 20200353259A1 · Nov 12, 2020