Semiconductor structure and formation method thereof

1. A method for forming a semiconductor structure, comprising:

providing a substrate, including a first region and a second region;

forming a gate structure over the substrate, and a source region and a drain region in the substrate on both sides of the gate structure;

forming a first interlayer dielectric layer over the substrate, a top of the first interlayer dielectric layer being coplanar with a top of the gate structure;

forming a plurality of metal plugs in the first interlayer dielectric layer, the metal plugs being connected to the source region and the drain region;

forming a second interlayer dielectric layer over the first interlayer dielectric layer;

forming a first via in the first region exposing a metal plug, and a second via in the second region exposing the first interlayer dielectric layer by etching the second interlayer dielectric layer;

fully filling the first via with a first tungsten layer;

forming an adhesion layer over the first tungsten layer, the second interlayer dielectric layer, and a sidewall and bottom of the second via; and

fully filling the second via with a second tungsten layer.

2. The method according to claim 1 , wherein filling the first via with the first tungsten layer includes a selective deposition method.

3. The method according to claim 2 , wherein process parameters of the selective deposition method includes a reaction gas of tungsten hexafluoride and hydrogen, a reaction pressure of less than 20 torr, and a gas flow rate of tungsten hexafluoride and hydrogen ranging from 100 sccm to 300 sccm.

4. The method according to claim 1 , wherein filling the second via with the second tungsten layer includes:

depositing the second tungsten layer over the adhesion layer;

performing a chemical mechanical polishing (CMP) process on the second tungsten layer until exposing the adhesion layer; and

performing another CMP process on the adhesion layer until exposing the second interlayer dielectric layer.

5. The method according to claim 4 , wherein depositing the second tungsten layer includes a chemical vapor deposition (CVD) method, a physical vapor deposition (PVD) method, or a combination thereof.

6. The method according to claim 4 , wherein performing the CMP process on the second tungsten layer includes a polishing pressure of 1 psi to 5 psi, a polish head rotation speed of 20 rpm to 100 rpm, and PH value of a polishing slurry ranging from 2 to 6.

7. The method according to claim 4 , wherein performing the another CMP process on the adhesion layer includes a polishing pressure of 1 psi to 5 psi, a polish head rotation speed of 20 rpm to 100 rpm, and PH value of a polishing slurry ranging from 2 to 6.

8. The method according to claim 1 , wherein forming the adhesion layer includes a CVD method, a PVD method, an atomic layer deposition (ALD) method, or a combination thereof.

9. The method according to claim 1 , wherein a material of the adhesion layer includes titanium nitride (TiN), tantalum nitride (TaN), titanium (Ti), or a combination thereof.

10. The method according to claim 1 , wherein a metal for forming the metal plug includes cobalt or tungsten.

11. The method according to claim 10 , wherein when the metal for forming the metal plug is cobalt, a protective layer is formed over the cobalt before the first via is fully filled with the first tungsten layer.

12. The method according to claim 11 , wherein a material of the protective layer includes titanium nitride (TiN), tantalum nitride (TaN), tantalum (Ta), titanium (Ti), or a combination thereof.

13. The method according to claim 11 , wherein a material of the second interlayer dielectric layer includes silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), or a combination thereof.