IP Library Granted Patent US 11,221,932
Granted Patent B2
US 11,221,932 · App. 16/990,035 · Granted Jan 11, 2022

Methods and systems for monitoring the integrity of a GPU

Inventors: Stephen Viggers (Waterloo, CA); Tomislav Malnar (Waterloo, CA); Sherwyn R. Ramkissoon (Waterloo, CA); Gregory J. Szober (Waterloo, CA); Aidan Fabius (Waterloo, CA); Kenneth Wenger (Waterloo, CA); John McCormick (Waterloo, CA)
Assignee: Channel One Holdings Inc.
G06F11/263G06F11/0733G06F11/0739G06F11/2221G06F11/2236G06T1/20G06T1/60G06T7/0002G09G3/006G09G5/363G06T2207/30168G09G2330/12
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Quick Facts
Patent No.
US 11,221,932
App. No.
16/990,035
Granted
Jan 11, 2022
Kind
B2
Abstract

Methods and systems for monitoring the integrity of a graphics processing unit (GPU) are provided. The method comprises the steps of determining a known-good result associated with an operation of the GPU, and generating a test image comprising a test subject using the operation of the GPU, such that the test subject is associated with the known-good result. The test image is written to video memory, and the known-good result is written to system memory. Subsequently, the test subject from the test image is transferred from video memory to system memory. The test subject in the system memory is compared with the known-good result in system memory. If the test subject does not match the known-good result, then a conclusion is drawn that the integrity of the GPU has been compromised.

Claims (43)

1. A system for monitoring integrity of a graphics processing unit (GPU), the system comprising:

a GPU engine of the GPU;

a central processing unit (CPU) in communication with the GPU;

a video memory in communication with the CPU and the GPU;

a system memory in communication with the CPU and the GPU; and wherein

the CPU is arranged to:

determine a known-good result associated with an operation of the GPU, and

instruct the GPU engine to generate a test image that includes a test result; and wherein

the GPU engine is arranged to:

generate the test image including the test result according to the instruction from the CPU, and

write the test image including the test result to the video memory; and

the CPU is further arranged to:

transfer the test image from the video memory to the system memory,

compare the known-good result to the test result, and

write a result to the system memory indicating failure when the comparison indicates that the test result does not match the known-good result.

2. The system of claim 1 , wherein the known-good result is pixel data.

3. The system of claim 1 , wherein the known-good result is a cyclic-redundancy check value.

4. The system of claim 1 , wherein the known-good result comprises an expected sequence number based on a known sequence, and wherein the GPU generates the test image including the test result based on the known sequence.

5. The system of claim 1 , wherein the result is a flag written to the system memory.

6. The system of claim 1 , wherein the test image is written to a frame buffer in the video memory.

7. The system of claim 6 , the system further comprising a display controller, wherein the frame buffer is marked for display by the display controller.

8. The system of claim 6 , further comprising a display controller, wherein the frame buffer is not marked for display by the display controller.

9. The system of claim 1 , the system further comprising a graphics application stored in the system memory including application code that is executable by the CPU and structured to cause the CPU to be configured to:

determine that an erroneous GPU operation has occurred based on the result; and

activate a warning signal without communicating with the GPU.

10. The system of claim 1 , wherein the system further comprises a display controller in communication with the video memory, the CPU and the GPU, and wherein the computer instruction code is further structured to cause the CPU to be configured to:

read a register of a display controller to determine if there is updated data being transmitted from the GPU to the display controller.

11. A method of monitoring integrity of a graphics processing unit (GPU) using a central processing unit (CPU) in communication with the GPU, the method comprising:

generating, by the CPU, a known-good result associated with an operation of the GPU, and instructing a GPU engine of the GPU to generate a test image that includes a test result;

generating, by the GPU engine of the GPU, the test image including the test result according to the instruction from the CPU, and writing the test image including the test result to the video memory; and

transferring, by the CPU, the test image from the video memory to a system memory, comparing the known-good result to the test result, and writing a result to the system memory indicating failure when the comparison indicates that the test result does not match the known-good result.

12. The method of claim 11 , wherein the known-good result is pixel data.

13. The method of claim 11 , wherein the known-good result is a cyclic-redundancy check value.

14. The method of claim 11 , wherein the known-good result comprises an expected sequence number based on a known sequence, and wherein the GPU generates the test image including the test result based on the known sequence.

15. The method of claim 11 , wherein the result is a flag written to the system memory.

16. The method of claim 11 , wherein the test image is written to a frame buffer in the video memory.

17. The method of claim 16 , further comprising marking the frame buffer as for display by a display controller.

18. The method of claim 16 , further comprising marking the frame buffer as not for display by a display controller.

19. The method of claim 11 , further comprising the CPU determining that an erroneous GPU operation has occurred based on the result, and activating a warning signal without communicating with the GPU.

20. A non-transitory computer-readable medium system storing computer program code executable by a graphics processing unit (GPU) and a central processing unit (CPU), the computer program code, when executed, structured to cause the GPU and the CPU to be configured to:

generate, by the CPU, a known-good result associated with an operation of the GPU, and instructing a GPU engine of the GPU to generate a test image that includes a test result;

generate, by the GPU engine of the GPU, the test image including the test result according to the instruction from the CPU, and writing the test image including the test result to the video memory; and

transfer, by the CPU, the test image from the video memory to a system memory, comparing the known-good result to the test result, and writing a result to the system memory indicating failure when the comparison indicates that the test result does not match the known-good result.

Assignments (2)
SECURITY INTEREST Recorded Jan 16, 2025
From: CHANNEL ONE HOLDINGS INC.
To: PENNANTPARK LOAN AGENCY SERVICING, LLC, AS ADMINISTRATIVE AGENT
Reel/Frame 069890/0481 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 11, 2020
From: VIGGERS, STEPHEN; MALNAR, TOMISLAV; RAMKISSOON, SHERWYN R.; SZOBER, GREGORY J.; FABIUS, AIDAN; WENGER, KENNETH; MCCORMICK, JOHN
To: CHANNEL ONE HOLDINGS INC.
Reel/Frame 053453/0833 →
Continuity (4)
Continuation 16193344 · Nov 16, 2018
Continuation 15383338 · Dec 19, 2016
Provisional Application 62269619 · Dec 18, 2015
Related Publication 20210042203A1 · Feb 11, 2021