IP Library Granted Patent US 11,387,096
Granted Patent B2
US 11,387,096 · App. 16/991,253 · Granted Jul 12, 2022

Wafer level sequencing flow cell fabrication

Inventors: Shifeng Li (Fremont, CA); Jian Gong (Danville, CA); Yan-You Lin (Fremont, CA); Cheng Frank Zhong (Menlo Park, CA)
Assignee: MGI Tech Co., Ltd.
H01L21/022B01L3/502707G01N21/05G01N21/6454G01N33/48707H01L21/02131H01L21/02175H01L21/02266H01L21/02422H01L21/28264H01L29/20B01L3/502715B01L3/502784B01L2300/0663B01L2300/0816B01L2300/0861B01L2300/0877B01L2300/165G01N2021/058
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Quick Facts
Patent No.
US 11,387,096
App. No.
16/991,253
Granted
Jul 12, 2022
Kind
B2
Abstract

A method for forming sequencing flow cells can include providing a semiconductor wafer covered with a dielectric layer, and forming a patterned layer on the dielectric layer. The patterned layer has a differential surface that includes alternating first surface regions and second surface regions. The method can also include attaching a cover wafer to the semiconductor wafer to form a composite wafer structure including a plurality of flow cells. The composite wafer structure can then be singulated to form a plurality of dies. Each die forms a sequencing flow cell. The sequencing flow cell can include a flow channel between a portion of the patterned layer and a portion of the cover wafer, an inlet, and an outlet. Further, the method can include functionalizing the sequencing flow cell to create differential surfaces.

Claims (57)

1. A method for forming sequencing flow cells, comprising:

providing a semiconductor wafer having a front side and a back side, the front side covered with a dielectric layer;

forming a patterned layer on the dielectric layer on the front side of the semiconductor wafer, the patterned layer having differential surface regions that include first surface regions and second surface regions;

forming a plurality of through holes through the back side of the semiconductor wafer;

attaching a cover wafer to the front side of the semiconductor wafer to form a composite wafer structure that includes a plurality of sequencing flow cells, wherein each sequencing flow cell includes:

a flow channel between the patterned layer and the cover wafer;

one or more first surface regions in the patterned layer;

one or more second surface regions in the patterned layer; and

an inlet and an outlet coupled to the flow channel, the inlet and the outlet being formed by through holes through the semiconductor substrate; and

singulating the composite wafer structure to form a plurality of dies, each die including a sequencing flow cell.

2. The method of claim 1 , wherein the first surface regions are hydrophilic surfaces and the second surface regions are hydrophobic surfaces.

3. The method of claim 1 , wherein the first surface regions are hydrophobic surfaces and the second surface regions are hydrophilic surfaces.

4. The method of claim 1 , wherein the semiconductor wafer further comprises a CMOS layer underlying the dielectric layer.

5. The method of claim 1 , wherein forming a patterned layer comprises:

forming a metal oxide layer overlying the dielectric layer on the semiconductor wafer; and

patterning the metal oxide layer into a plurality of metal oxide regions,

wherein the metal oxide regions are configured to receive nucleic acid macromolecules.

6. The method of claim 1 , wherein forming a patterned layer comprises:

forming a metal oxide layer;

forming a silicon oxide layer overlying the metal oxide layer; and

patterning the silicon oxide layer,

wherein regions of the metal oxide layer not covered by the silicon oxide layer are configured to receive a nucleic acid macromolecule.

7. The method of claim 1 , further comprising forming a support structure on the semiconductor wafer before attaching the cover wafer to the semiconductor wafer.

8. The method of claim 7 , further comprising bonding the cover wafer to the support structure.

9. The method of claim 1 , wherein the cover wafer comprises a glass wafer.

10. The method of claim 1 , further comprising functionalizing the sequencing flow cell, wherein functionalizing the sequencing flow cell comprises exposing the flow channel to materials supplied through the inlet and outlet.

11. The method of claim 1 , wherein singulating the composite wafer structure comprises separating the composite wafer structure into individual dies using a wafer cutting process.

12. The method of claim 2 , wherein forming a patterned layer comprises:

forming a metal oxide layer overlying the dielectric layer on the semiconductor wafer; and

patterning the metal oxide layer into a plurality of metal oxide regions,

wherein the metal oxide regions are configured to receive nucleic acid macromolecules.

13. The method of claim 3 , wherein forming a patterned layer comprises:

forming a metal oxide layer overlying the dielectric layer on the semiconductor wafer; and

patterning the metal oxide layer into a plurality of metal oxide regions,

wherein the metal oxide regions are configured to receive nucleic acid macromolecules.

14. A method for forming sequencing flow cells, comprising:

providing a semiconductor wafer covered with a dielectric layer;

forming a patterned layer on the dielectric layer, the patterned layer having metal oxide regions and oxide regions;

forming a plurality of through holes through the semiconductor wafer;

attaching a glass wafer to the semiconductor wafer to form a composite wafer structure that includes a plurality of sequencing flow cells, wherein each sequencing flow cell includes:

a glass layer;

multiple metal oxide regions and oxide regions; and

a flow channel between the glass layer and the multiple metal oxide regions and oxide regions,

wherein the through holes in the semiconductor wafer are configured as inlets and outlets of the sequencing flow cell; and

singulating the composite wafer structure to form a plurality of dies, each die including a sequencing flow cell.

15. The method of claim 14 , wherein forming a patterned layer comprises:

forming a metal oxide layer overlying the dielectric layer on the semiconductor wafer; and

patterning the metal oxide layer into a plurality of metal oxide regions,

wherein the metal oxide regions are configured to receive nucleic acid macromolecules.

16. The method of claim 14 , wherein forming a patterned layer comprises:

forming a metal oxide layer overlying the dielectric layer on the semiconductor wafer;

forming a silicon oxide layer overlying the metal oxide layer; and

patterning the silicon oxide layer,

wherein regions of the metal oxide layer not covered by the silicon oxide layer.

17. The method of claim 14 , further comprising bonding the glass wafer to the semiconductor wafer.

18. The method of claim 14 , further comprising functionalizing the sequencing flow cell, wherein functionalizing the sequencing flow cell comprises exposing the sequencing flow cell to materials supplied through the inlet and outlet to form hydrophilic surface regions and hydrophobic surface regions.

19. The method of claim 15 , further comprising functionalizing the sequencing flow cell, wherein functionalizing the sequencing flow cell comprises exposing the sequencing flow cell to materials supplied through the inlet and outlet to form hydrophilic surface regions and hydrophobic surface regions.

Continuity (4)
Continuation 16128120 · Sep 11, 2018
Provisional Application 62669890 · May 10, 2018
Provisional Application 62560585 · Sep 19, 2017
Related Publication 20210013025A1 · Jan 14, 2021