Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
Methods for depositing a molybdenum nitride film on a surface of a substrate are disclosed. The methods may include: providing a substrate into a reaction chamber; and depositing a molybdenum nitride film directly on the surface of the substrate by performing one or more unit deposition cycles of cyclical deposition process, wherein a unit deposition cycle may include, contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor, and contacting the substrate with a second vapor phase reactant comprising a nitrogen precursor. Semiconductor device structures including a molybdenum nitride film are also disclosed.
1. A method for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process, the method comprising:
providing a substrate into a reaction chamber; and
depositing a molybdenum nitride film directly on the surface of the substrate by performing one or more unit deposition cycles of a cyclical deposition process, wherein a unit deposition cycle comprises:
contacting the substrate with a first vapor phase reactant comprising a molybdenum precursor; and
contacting the substrate with a second vapor phase reactant comprising a nitrogen precursor,
wherein the molybdenum nitride film is physically continuous at an average film thickness of less than 40 Å.
2. The method of claim 1 , wherein the unit deposition cycle further comprises, contacting the substrate with a third vapor phase reactant comprising a reducing agent.
3. The method of claim 2 , wherein the substrate is contacted with the nitrogen precursor and the reducing agent concurrently.
4. The method of claim 2 , wherein a purge cycle is performed between the processes of contacting the substrate with the nitrogen precursor and contacting the substrate with the reducing agent.
5. The method of claim 2 , wherein the reducing agent comprises at least one of: molecular hydrogen (H 2 ), atomic hydrogen (H), forming gas (H 2 +N 2 ), ammonia (NH 3 ), hydrazine (N 2 H 4 ), a hydrazine derivative, a hydrogen based plasma, an alcohol, an aldehyde, a carboxylic acid, a borane, an amine, or a silane.
6. The method of claim 1 , wherein the nitrogen precursor comprises at least one of: molecular nitrogen (N 2 ), ammonia (NH 3 ), hydrazine (N 2 H 4 ), a hydrazine derivative, or a nitrogen-based plasma.
7. The method of claim 1 , further comprising heating the substrate to a deposition temperature of less than 450° C.
8. The method of claim 1 , wherein the molybdenum precursor comprises a molybdenum oxyhalide precursor.
9. The method of claim 8 , wherein the molybdenum oxychloride precursor comprises at least one of: molybdenum (V) trichloride oxide (MoOCl 3 ), molybdenum (VI) tetrachloride oxide (MoOCl 4 ), or molybdenum (IV) dichloride dioxide (MoO 2 Cl 2 ).
10. The method of claim 1 , wherein the molybdenum precursor comprises at least one of: molybdenum pentachloride (MoCl 5 ), or molybdenum hexachloride (MoCl 6 ).
11. The method of claim 1 , wherein the molybdenum precursor comprises at least one of: Mo(NMe 2 ) 4 , Mo(NEt 2 ) 4 , Mo 2 (NMe 2 ) 6 , Mo(tBuN) 2 (NMe 2 ) 2 , Mo(tBuN) 2 (NEt 2 ) 2 , Mo(NEtMe) 4 , Mo(NtBu) 2 (StBu) 2 , Mo(NtBu) 2 (iPr 2 AMD) 2 Mo(thd) 3 , MoO 2 (acac), MoO 2 (thd) 2 , MoO 2 (iPr 2 AMD) 2 Mo(CO) 6 , Mo(Cp) 2 H 2 , Mo(iPrCp) 2 H 2 , Mo(η 6 -ethylbenzene) 2 , MoCp(CO) 2 (η 3 -allyl), and MoCp(CO) 2 (NO).
12. The method of claim 1 , wherein the molybdenum nitride film has an electrical resistivity of less than 750 μΩ-cm at an average molybdenum nitride film thickness of less than 50 Å.
13. The method of claim 1 , wherein the molybdenum nitride film has an electrical resistivity of less than 250 μΩ-cm at an average molybdenum nitride film thickness of less than 100 Å.
14. The method of claim 1 , wherein the molybdenum nitride film has an electrical resistivity of less than 400 μΩ-cm at an average molybdenum nitride film thickness of less than 25 Å.
15. The method of claim 1 , wherein the molybdenum nitride film has a percentage roughness of less than 1.5%.
16. The method of claim 1 , wherein the composition of the molybdenum nitride film comprises both a MoN phase and a Mo 2 N phase.
17. The method of claim 1 , wherein the molybdenum nitride film is deposited directly on a dielectric surface.
18. The method of claim 1 , wherein the molybdenum nitride film comprises a portion of a gate stack disposed over a semiconductor channel region, wherein the gate stack has an effective work function of greater than 4.6 eV at an average molybdenum nitride film thickness of less than 50 Å.
19. The method of claim 1 , wherein the molybdenum nitride film comprises a portion of a gate stack disposed over a semiconductor channel region, wherein the gate stack has an effective work function of greater than 4.75 eV at an average molybdenum nitride film thickness of less than 50 Å.
20. The method of claim 1 , wherein the molybdenum nitride film comprises a portion of a gate stack disposed over a semiconductor channel region, wherein the gate stack has an effective work function between approximately 4.6 eV and 4.75 eV at an average molybdenum nitride film thickness between approximately 15 Å and 50 Å.
21. The method of claim 2 , wherein the molybdenum nitride film comprises a portion of a gate stack disposed over a semiconductor channel region, wherein the gate stack has a substantially constant effective work function of approximately 4.75 eV at an average molybdenum nitride film thickness between approximately 15 Å and 50 Å.
22. A reaction system configured to perform the method of claim 1 .
23. A semiconductor device structure including a molybdenum nitride film deposited by the method of claim 1 .
24. A semiconductor device structure comprising:
a semiconductor channel region; and
a gate stack disposed directly on the semiconductor channel region, wherein the gate stack comprises:
a gate dielectric disposed on the semiconductor channel region; and
a gate electrode comprising a molybdenum nitride film disposed on the gate dielectric,
wherein the gate stack has an effective work function greater than 4.6 eV at an average molybdenum nitride film thickness of less than 50 Å.
25. The semiconductor device structure of claim 24 , wherein the gate dielectric is disposed directly on the semiconductor channel region.
26. The semiconductor device structure of claim 24 , wherein the molybdenum nitride film is disposed directly on the gate dielectric.
27. The semiconductor device structure of claim 24 , wherein the molybdenum nitride film has an electrical resistivity of less than 750 μΩ-cm at an average molybdenum nitride film thickness of less than 100 Å.
28. The semiconductor device structure of claim 24 wherein the molybdenum nitride film has an electrical resistivity of less than 250 μΩ-cm at an average molybdenum nitride film thickness of less than 100 Å.
29. The semiconductor device structure of claim 24 , wherein the molybdenum nitride film has an electrical resistivity of less than 500 μΩ-cm at an average molybdenum nitride film thickness of less than 25 Å.
30. The semiconductor device structure of claim 24 , wherein the molybdenum nitride film has a composition comprising both a MoN phase and a Mo 2 N phase.
31. The semiconductor device structure of claim 24 , wherein the molybdenum nitride film is a physically continuous molybdenum nitride film having an average film thickness of less than 40 Å.
32. The semiconductor device structure of claim 24 , wherein the molybdenum nitride film is amorphous.
33. The semiconductor device structure of claim 24 , wherein the molybdenum nitride film is crystalline.
34. The semiconductor device structure of claim 24 , wherein the gate stack has an effective work function greater than 4.75 eV at an average molybdenum nitride film thickness equal to or less than 50 Å.
35. The semiconductor device structure of claim 24 , wherein the gate stack has a substantially constant effective work function of approximately 4.75 eV at an average molybdenum nitride film thickness between 15 Å and 50 Å.
36. The semiconductor device structure of claim 24 , wherein the semiconductor channel region comprises a portion of a FinFET semiconductor device structure.
37. The semiconductor device structure of claim 24 , wherein the semiconductor channel region comprises a portion of a gate-all-around semiconductor device structure.
38. A method for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process, the method comprising:
providing a substrate into a reaction chamber; and
depositing a molybdenum nitride film directly on the surface of the substrate by performing one or more unit deposition cycles of a cyclical deposition process, wherein a unit deposition cycle comprises:
contacting the substrate with a first vapor phase reactant comprising a molybdenum precursor; and
contacting the substrate with a second vapor phase reactant comprising a nitrogen precursor,
wherein the molybdenum nitride film comprises a portion of a gate stack disposed over a semiconductor channel region, wherein the gate stack has an effective work function between approximately 4.6 eV and 4.75 eV at an average molybdenum nitride film thickness between approximately 15 Å and 50 Å.