System including an application processor and a data storage device providing data
A system includes an application processor configured to generate a read request and including a data memory; a host processor configured to generate a read command corresponding to the read request; and a data storage device including a data storage memory, wherein the data storage device transmits read data output from the data storage device according to the read command to the data memory of the application processor without passing the host processor.
1. A system comprising:
a graphics processing unit (GPU) configured to generate a read request and including a data memory;
a central processing unit (CPU) configured to generate a read command corresponding to the read request; and
a data storage device including a data storage memory,
wherein the data storage device transmits entire read data output from the data storage device according to the read command to the data memory of the GPU without passing the CPU,
wherein the data storage device further comprises a data shared memory storing the read data,
wherein the data shared memory includes an address space shared with the data memory, and
wherein the GPU transfers offset information regarding an address of the data memory along with the read request to the CPU, the CPU transfers the read command with the offset information to the data storage device, and the data storage device stores the read data in the data shared memory at an address corresponding to the offset information.
2. The system of claim 1 , wherein the GPU further comprises a first data input/output (IO) control circuit to transfer the read data received from the data storage device to the data memory.
3. The system of claim 2 , wherein the data storage device further comprises a second data IO control circuit to transfer the read data stored in the data shared memory to the data memory.
4. The system of claim 1 , wherein the CPU comprises:
a GPU shared memory configured to store the read request provided by the GPU;
a request management circuit configured to monitor the GPU shared memory; and
a command control circuit configured to generate the read command corresponding to the read request stored in the GPU shared memory.
5. The system of claim 4 , wherein the request management circuit controls the command control circuit so that the read command corresponding to the read request is generated when the read request is stored in the GPU shared memory, and records a flag representing completion of processing of the read command in the GPU shared memory when processing of the read command is completed.
6. The system of claim 1 , wherein the GPU comprises:
a request generating circuit configured to generate the read request; and
a shared memory control circuit configured to transfer the read request to the GPU and to monitor completion of processing of the read request.
7. The system of claim 6 , wherein the shared memory control circuit records a flag representing completion of processing when processing of the request is completed and the request generating circuit performs a subsequent operation by receiving the read data from the data memory.
8. The system of claim 1 , wherein the data storage device further comprises a command processing circuit to control the data storage device so that the read data is output according to the read command.
9. The system of claim 8 , wherein the command processing circuit notifies completion of processing of the read command when the read data is transferred to the GPU.
10. The system of claim 1 , further comprising a bus circuit coupling the GPU and the CPU, the CPU and the data storage device, or the data storage device and the GPU.
11. The system of claim 1 , wherein the data storage device is a key-value based device,
wherein the read request has a format for reading a value corresponding to a key and the read data includes the value corresponding to the key.
12. A system comprising:
a graphics processing unit (GPU) configured to generate a read request and including a data memory;
a central processing unit (CPU) configured to generate a read command corresponding to the read request; and
a data storage device including a data storage memory,
wherein the data storage device transmits entire read data output from the data storage device according to the read command to the data memory of the GPU without passing the CPU,
wherein the GPU further generates a write request and write data, the GPU stores the write data in the data memory, and the GPU transfers the write data to the data storage device without passing the CPU,
wherein the data storage device further comprises a data shared memory to store the write data, and the data shared memory includes an address space shared with the data memory, and
wherein the GPU transfers offset information regarding an address of the data memory where the write data is stored along with the write request to the CPU, the CPU transfers the write request with the offset information to the data storage device, and the data storage device stores the write data in the data shared memory at an address corresponding to the offset information.
13. The system of claim 12 , wherein the GPU further comprises a first data IO control circuit to transfer the write data stored in the data memory to the data storage device.
14. The system of claim 13 , wherein the data storage device further comprises a second data IO control circuit to transfer the write data to the data shared memory referring to the offset information.