IP Library › Granted Patent US 11,526,438
Granted Patent B2
US 11,526,438 · App. 17/002,210 · Granted Dec 13, 2022

Memory system capable of increasing storage efficiency and operation method thereof

Inventor: Eu Joon Byun (Gyeonggi-do, KR)
Assignee: SK hynix Inc.
G06F12/0261G06F12/0246G06F12/0882G06F12/0891
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Quick Facts
Patent No.
US 11,526,438
App. No.
17/002,210
Granted
Dec 13, 2022
Kind
B2
Abstract

An operation method of a controller, comprising: selecting a target super block, on which garbage collection (GC) is to be performed, among a plurality of super blocks which are completely programmed, based on a first valid page count of each of the super blocks when a determination to perform GC is made; selecting a first target block among a plurality of memory blocks in the target super block based on a second valid-page decrease amount of each of the memory blocks; and performing a first copy operation on valid pages in the first target block.

Claims (52)

1. An operation method of a controller, comprising:

selecting a target super block whose a first valid page count is equal to or less than a target value, on which garbage collection (GC) is to be performed, among a plurality of super blocks which are completely programmed, when a determination to perform GC is made;

calculating a second valid-page decrease amount of each of the memory blocks based on a first count that is the number of valid pages in the corresponding memory block when a determination to perform a current GC is made, and a second count that is the number of valid pages in the corresponding memory block when a determination to perform a previous GC is made;

selecting a first target memory block among a plurality of memory blocks in the target super block, based on the second valid-page decrease amount of each of the memory blocks; and

performing the first copy operation on valid pages in the first target memory block.

2. The operation method of claim 1 , further comprising:

checking a second valid page count of a second target memory block, among the plurality of memory blocks, after the first copy operation is completed.

3. The operation method of claim 2 , further comprising:

determining the target super block as an erase target super block, without performing a second copy operation on valid pages in the second target memory block, when the second valid page count of the second target memory block is ‘0’.

4. The operation method of claim 2 , further comprising:

performing a second copy operation on valid pages in the second target memory block after a threshold time elapses from completion of the first copy operation; and

determining the target super block as an erase target super block.

5. The operation method of claim 4 , wherein the second copy operation is performed when the second valid page count of the second target memory block is equal to or more than 1 and less than a threshold value.

6. The operation method of claim 3 , further comprising performing an erase operation on the erase target super block.

7. The operation method of claim 2 , wherein the second valid-page decrease amount of the first target block is less than the reference value, and the second valid-page decrease amount of the second target memory block is equal to or more than the reference value.

8. The operation method of claim 2 , wherein, among the plurality of memory blocks, the second target memory block has the greatest second valid-page decrease amount.

9. An operation method of a memory system having memory device, comprising:

selecting a target super block whose a first valid page count is equal to or less than a target value, on which a first garbage collection (GC) is to be performed, among a plurality of closed super blocks, when a determination to perform the GC is made;

calculating a second valid-page decrease amount of each of the memory blocks based on a first count that is the number of valid pages in the corresponding memory block when a determination to perform a current GC is made, and a second count that is the number of valid pages in the corresponding memory block when a determination to perform a previous GC is made;

designating each of a plurality of memory blocks on which a first copy operation is to be performed preferentially in the target super block as a first target memory block or a second target memory block based on a second valid-page decrease amount of each of the memory blocks, when an invalidation rate of valid pages in the memory device is less than a set value; and

performing the first copy operation on the first target memory block before performing a second copy operation on the second target memory block.

10. The operation method of claim 9 , further comprising determining the target super block as an erase target super block, without performing the second copy operation on valid pages in the second target memory block, when the second valid page count of the second target memory block is ‘0’.

11. The operation method of claim 9 , further comprising:

performing the second copy operation on valid pages in the second target memory block after a threshold time elapses from completion of the first copy operation; and

determining the target super block as an erase target super block.

12. The operation method of claim 11 , wherein the second copy operation is performed when the second valid page count of the second target memory block is equal to or more than 1 and less than a threshold value.

13. The operation method of claim 10 , further comprising performing an erase operation on the erase target super block.

14. The operation method of claim 9 , wherein the second valid-page decrease amount of the first target block is less than a reference value, and the second valid-page decrease amount of the second target memory block is equal to or more than the reference value.

15. The operation method of claim 9 , wherein, among the plurality of memory blocks, the second target memory block has the highest valid-page decrease amount.

16. The operation method of claim 9 , wherein the invalidation rate of valid pages in the memory device is determined based on one or more of a valid-page decrease of each of the super blocks, the number of programmable pages in free super blocks, and the size of data on which a program operation is to be performed.

17. The operation method of claim 9 , further comprising:

performing a copy operation on the target super block when the invalidation rate of valid pages in the memory device is greater than the set value; and

determining the target super block as an erase target super block.

18. A memory system comprising:

a memory device comprising a plurality of super blocks each including a plurality of memory blocks; and

a controller suitable for selecting a first target memory block on which a first copy operation is to be performed preferentially among a plurality of memory blocks included in a target super block whose a first valid page count is equal to or less than a target value, on which garbage collection (GC) is to be performed, and performing the first copy operation on the first target memory block, when a determination to perform the GC is made,

wherein the controller selects the first target memory block based on a second valid-page decrease amount of each of the plurality of memory blocks in the target super block,

wherein the controller calculates the second valid-page decrease amount of each of the memory blocks based on a first count that is the number of valid pages in the corresponding memory block when a determination to perform a current GC is made, and a second count that is the number of valid pages in the corresponding memory block when a determination to perform a previous GC is made.

19. The memory system of claim 18 , wherein the controller checks a second valid page count of a second target memory block, among the plurality of memory blocks, after the first copy operation is completed.

20. The memory system of claim 19 , wherein the controller determines the target super block as an erase target super block, without performing a second copy operation on valid pages in the second target memory block, when the second valid page count of the second target memory block is ‘0’.

21. The memory system of claim 19 , wherein the controller is further suitable for:

performing a second copy operation on valid pages included in the second target memory block after a threshold time elapses from completion of the first copy operation; and

determining the target super block as an erase target super block.

22. The memory system of claim 20 , wherein the controller performs the second copy operation when the second valid page count of the second target memory block is equal to or more than 1 and less than a threshold value.

23. The memory system of claim 19 , wherein the second valid-page decrease amount of the first target block is less than a reference value, and the second valid-page decrease amount of the second target memory block is equal to or more than the reference value.

24. The memory system of claim 19 , wherein, among the plurality of memory blocks in the target super block, the second target memory block has the greatest valid-page decrease amount.

25. An operating method of a controller, the operating method comprising:

determining, within a super block whose a first valid page count is equal to or less than a target value, on which garbage collection (GC) is to be performed, one or more first target memory blocks on which a first garbage collection operation is to be performed preferentially and one or more second target memory blocks, based on the valid-page decrease rate of each of memory blocks included in the super block, the valid-page decrease amount is calculated based on a first count that is the number of valid pages in the memory blocks when a determination to perform a current GC is made, and a second count that is the number of valid pages in the corresponding memory block when a determination to perform a previous GC is made;

controlling a memory device to perform the first garbage collection operation on valid pages in the one or more first target memory blocks; and

controlling the memory device to perform a second garbage collection operation on one or more valid pages, which remain in the one or more second target memory blocks at a set time after completion of the garbage collection operation on the one or more first target memory blocks,

wherein each of the first target memory blocks has a valid-page decrease rate less than a threshold, and

wherein each of the second target memory blocks has a valid-page decrease rate equal to or greater than the threshold.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2020
From: BYUN, EU JOON
To: SK HYNIX INC.
Reel/Frame 053591/0350 →
Priority Claims (1)
KR 10-2019-0152272 · Nov 25, 2019 · national
Continuity (1)
Related Publication 20210157723A1 · May 27, 2021