IP Library › Granted Patent US 11,644,808
Granted Patent B2
US 11,644,808 · App. 17/012,112 · Granted May 9, 2023

Programable logic controller

Inventor: Tatsuya Nakamura (Osaka, JP)
Assignee: KEYENCE CORPORATION
G05B19/05G06F13/36G05B2219/1131
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Quick Facts
Patent No.
US 11,644,808
App. No.
17/012,112
Granted
May 9, 2023
Kind
B2
Abstract

To efficiently collect and transfer monitoring target data in a PLC. The PLC includes a first execution engine, a holding section, and a second execution engine. Further, the PLC collects data stored in a collection target holding section according to predetermined collection setting, accumulates collected time-series data in a first buffer, and transfers the time-series data stored in the first buffer to the second execution engine via a bus. The second execution performs data processing of the transferred time series data, generates display data to be displayed on a dashboard, and provides the display data to an external computer.

Claims (73)

1. A programmable logic controller comprising:

a first execution engine configured to repeatedly execute a first user program;

a plurality of holding sections, which are devices or variables configured to store data accessed by the first execution engine according to the first user program;

a second execution engine configured to execute a second user program asynchronous with a scan period of the first user program;

a bus configured to connect the first execution engine and the second execution engine;

a collecting section configured to collect, at every scan period of the first user program, according to predetermined collection setting, data stored in a collection target holding section among the plurality of holding sections;

a first buffer configured to accumulate time-series data collected at the every scan period by the collecting section; and

a transferring section configured to transfer the time-series data stored in the first buffer to the second execution engine via the bus, wherein

the second execution engine includes:

a processing section configured to perform, according to predetermined processing setting, data processing of the time-series data transferred by the transferring section;

a generating section configured to generate display data for displaying a processing result of the data processing on a dashboard; and

a web server configured to provide the display data displaying the processing result of the data processing on the dashboard to a web browser accessing a web page of the dashboard on an external computer.

2. The programmable logic controller according to claim 1 , further comprising a monitoring section configured to monitor priority of information about to be transferred in the bus, wherein

the transferring section transfers the time-series data to the second execution engine at timing when information having priority higher than priority of the time-series data is absent and suppresses transfer of the time-series data to the second execution engine at timing when information having priority higher than the priority of the time-series data is present.

3. The programmable logic controller according to claim 2 , wherein the transferring section executes the transfer of the time-series data while avoiding a period in which the first execution engine is executing the input and output refresh using the bus.

4. The programmable logic controller according to claim 1 , further comprising a compressing section configured to compress the time-series data stored in the first buffer in parallel to the first execution engine executing the first user program, wherein

the transferring section transfers the time-series data compressed by the compressing section to the second execution engine.

5. The programmable logic controller according to claim 4 , wherein

the time-series data stored in the first buffer includes a plurality of data records acquired at every scan period, and

when two successive data records among the plurality of data records coincide, the compressing section discards one of the two data records to leave a data record at a change point of data among the plurality of data records.

6. The programmable logic controller according to claim 1 , further comprising a second buffer configured to store the time-series data transferred by the transferring section, wherein

the second execution engine is configured to refer to the time-series data stored in the second buffer.

7. The programmable logic controller according to claim 1 , wherein

the transferring section is configured to acquire data from a holding section of an extension unit and transfer the data to the second execution engine,

the programmable logic controller further comprises a third buffer configured to accumulate the data acquired from the holding section of the extension unit, and

the second execution engine is configured to read out the data from the third buffer and execute the data processing.

8. The programmable logic controller according to claim 7 , wherein

the extension unit includes a fourth buffer configured to store the data acquired from the holding section of the extension unit according to a predetermined control period different from the scan period, and

the transferring section is configured to acquire the data of the holding section of the extension unit from the fourth buffer.

9. The programmable logic controller according to claim 1 , wherein

the time-series data includes a first data record and a second data record respectively acquired at different timings, and

the second execution engine calculates a time interval between timing when a bit of interest included in the first data record changes and timing when a bit of interest included in the second data record changes.

10. The programmable logic controller according to claim 1 , wherein

the time-series data includes first waveform data and second waveform data respectively acquired at different timings,

the second execution engine matches a phase of the first waveform data and a phase of the second waveform data with a reference phase, and

the generating section generates display data for displaying, on the dashboard, the first waveform data and the second waveform data matched with the reference phase.

11. The programmable logic controller according to claim 6 , wherein

the processing section is configured to execute a first data utilization application and a second data utilization application, and

the programmable logic controller further comprises:

a first sub-buffer;

a second sub-buffer; and

a distributing section configured to distribute data for the first data utilization application among the time-series data stored in the second buffer to the first sub-buffer and distribute data for the second data utilization application among the time-series data stored in the second buffer to the second sub-buffer.

12. The programmable logic controller according to claim 1 , wherein the transferring section is configured to subdivide and transfer the time-series data.

13. The programmable logic controller according to claim 1 , wherein the transferring section is configured to transfer the time-series data in parallel to the first execution engine executing the first user program.

14. A programmable logic controller comprising:

a basic unit; and

an extension unit connected to the basic unit, wherein

the basic unit includes:

an execution engine configured to repeatedly execute a user program;

a plurality of holding means, which are devices or variables configured to store data accessed by the execution engine according to the user program;

a collecting section configured to collect data stored in a collection target holding section among the plurality of holding sections according to predetermined collection setting at every scan period of the user program;

a first buffer configured to accumulate time-series data collected at the every scan period by the collecting section; and

a transferring section configured to transfer the time-series data stored in the first buffer to a data utilization unit, which is the extension unit connected via a bus, and

the data utilization unit includes:

a processing section configured to perform, according to predetermined processing setting, data processing of the time-series data transferred by the transferring section;

a generating section configured to generate display data for displaying a processing result of the data processing on a dashboard; and

a web server configured to provide the display data displaying the processing result of the data processing on the dashboard to a web browser accessing a web page of the dashboard on an external computer.

15. The programmable logic controller according to claim 14 , further comprising a monitoring section configured to monitor priority of information about to be transferred in the bus, wherein

the transferring section transfers the time-series data to the second execution engine at timing when information having priority higher than priority of the time-series data is absent and suppresses transfer of the time-series data to the second execution engine at timing when information having priority higher than the priority of the time-series data is present.

16. The programmable logic controller according to claim 14 , further comprising a compressing section configured to compress the time-series data stored in the first buffer in parallel to the first execution engine executing the first user program, wherein

the transferring section transfers the time-series data compressed by the compressing section to the second execution engine.

17. The programmable logic controller according to claim 16 , wherein

the time-series data stored in the first buffer includes a plurality of data records acquired at every scan period, and

when two successive data records among the plurality of data records coincide, the compressing section discards one of the two data records to leave a data record at a change point of data among the plurality of data records.

18. The programmable logic controller according to claim 14 , further comprising a second buffer configured to store the time-series data transferred by the transferring section, wherein

the second execution engine is configured to refer to the time-series data stored in the second buffer.

19. The programmable logic controller according to claim 18 , wherein

the processing section is configured to execute a first data utilization application and a second data utilization application, and

the programmable logic controller further comprises:

a first sub-buffer;

a second sub-buffer; and

a distributing section configured to distribute data for the first data utilization application among the time-series data stored in the second buffer to the first sub-buffer and distribute data for the second data utilization application among the time-series data stored in the second buffer to the second sub-buffer.

20. The programmable logic controller according to claim 14 , wherein the transferring section is configured to transfer the time-series data in parallel to the first execution engine executing the first user program.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2020
From: NAKAMURA, TATSUYA
To: KEYENCE CORPORATION
Reel/Frame 053692/0548 →
Priority Claims (2)
JP JP2019-183256 · Oct 3, 2019 · national
JP JP2020-111878 · Jun 29, 2020 · national
Continuity (1)
Related Publication 20210103264A1 · Apr 8, 2021