IP Library › Granted Patent US 12,363,929
Granted Patent B2
US 12,363,929 · App. 17/012,166 · Granted Jul 15, 2025

Semiconductor device

Inventors: Tomoko Matsudai (Tokyo, JP); Hiroko Itokazu (Kawasaki Kanagawa, JP); Keiko Kawamura (Yokohama Kanagawa, JP); Yoko Iwakaji (Tokyo, JP); Kaori Fuse (Yokohama Kanagawa, JP)
Assignees: Kabushiki Kaisha Toshiba; Toshiba Electronic Devices & Storage Corporation
H10D8/605H10D62/83H10D64/23H10D64/62H10D64/64H10D12/481
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Quick Facts
Patent No.
US 12,363,929
App. No.
17/012,166
Granted
Jul 15, 2025
Kind
B2
Abstract

A semiconductor device includes a semiconductor part, first and second electrodes. The semiconductor part includes first to third layers. The first electrode is provided on a back surface of the semiconductor part. The second electrode is provided on a front surface of the semiconductor part. The first layer of a first conductivity type extends between the first and second electrodes. The second layer of a second conductivity type is provided between the first layer and the second electrode. The third layer of the second conductivity type is provided between the second layer and the second electrode. The second electrode includes a buried contact portion and a surface contact portion. The buried contact portion extends into the second layer from the front surface of the semiconductor part and contacts the second layer. The surface contact portion contacts the third layer at the front surface of the semiconductor part.

Claims (27)

1. A semiconductor device, comprising:

a semiconductor part including a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type opposite the first conductivity type, and a third semiconductor layer of the second conductivity type;

a first electrode provided on a back surface of the semiconductor part;

a second electrode provided on a front surface of the semiconductor part, a third electrode provided between the semiconductor part and the second electrode, and

an inter-layer insulating film provided between the third electrode and the second electrode,

the third electrode being provided inside the semiconductor part, the third electrode being electrically insulated from the semiconductor part by a first insulating film, the third electrode being electrically insulated from the second electrode by the inter-layer insulating film, the third electrode having a largest dimension extending in an extension direction along the front surface of the semiconductor part,

the first semiconductor layer extending between the first and second electrodes,

the second semiconductor layer being provided between the first semiconductor layer and the second electrode,

the third semiconductor layer being provided between the second semiconductor layer and the second electrode, the third semiconductor layer including a second conductivity type impurity with a higher concentration than a concentration of a second conductivity type impurity in the second semiconductor layer, the third semiconductor layer directly contacts the second semiconductor layer,

the second electrode including a plurality of buried contact portions and a surface contact portion, the plurality of buried contact portions extending into the second semiconductor layer from the front surface of the semiconductor part, the surface contact portion contacting the front surface of the semiconductor part,

the plurality of buried contact portions being arranged one by one in a line arrangement, the line arrangement is in the extension direction of the third electrode, the plurality of the buried contact portions directly contacting the second semiconductor layer, the surface contact portion directly contacting an uppermost planar surface of the third semiconductor layer.

2. The semiconductor device according to claim 1 , wherein

the buried contact portions are connected to the second semiconductor layer with a first potential barrier to second conductivity type carriers injected from the buried contact portion into the second semiconductor layer, and

the first potential barrier is higher than a second potential barrier to second conductivity type carriers injected from the surface contact portion into the third semiconductor layer.

3. The semiconductor device according to claim 1 , wherein

the third semiconductor layer is provided between two mutually-adjacent buried contact portions of the plurality of buried contact portions of the second electrode, the two mutually-adjacent buried contact portions being in the line arrangement of the plurality of buried contact portions, and

the surface contact portion of the second electrode contacts the second semiconductor layer and the third semiconductor layer at the front surface of the semiconductor part.

4. The semiconductor device according to claim 1 , wherein

the plurality of buried contact portions extends through the third semiconductor layer into the second semiconductor layer.

5. The semiconductor device according to claim 1 , wherein

the buried contact portions each include first and second positions directed from the second electrode toward the first electrode, the first position being provided between the second position and the first electrode; and

the buried contact portions each have a first width at the first position and a second width at the second position, the first and second widths being defined along the front surface of the semiconductor part, the first width being greater than the second width.

6. The semiconductor device according to claim 1 , wherein

the buried contact portions each include first and second positions arranged directed from the second electrode toward the first electrode, the first position being provided between the second position and the first electrode; and

the buried contact portions each have a first width at the first position and a second width at the second position, the first and second widths being defined along the front surface of the semiconductor part, the first width being less than the second width.

7. The semiconductor device according to claim 1 , wherein

the semiconductor part further includes a fourth semiconductor layer of the first conductivity type, the fourth semiconductor layer being provided between the first semiconductor layer and the first electrode, the fourth semiconductor layer including a first conductivity type impurity with a higher concentration than a concentration of a first conductivity type impurity in the first semiconductor layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2020
From: MATSUDAI, TOMOKO; ITOKAZU, HIROKO; KAWAMURA, KEIKO; IWAKAJI, YOKO; FUSE, KAORI
To: KABUSHIKI KAISHA TOSHIBA; TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
Reel/Frame 053859/0565 →
Priority Claims (1)
JP 2020-048761 · Mar 19, 2020 · national
Continuity (1)
Related Publication 20210296477A1 · Sep 23, 2021
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