Electronic devices comprising adjoining oxide materials and related systems

1. An electronic device comprising:

a cell region comprising stacks of alternating dielectric materials and conductive materials;

a pillar region adjacent to the cell region, the pillar region comprising storage node segments adjacent to adjoining oxide materials and adjacent to a tunnel region, the storage node segments vertically separated only by a lateral extension of the tunnel region; and

a high-k dielectric material adjacent to the conductive materials of the cell region and to the adjoining oxide materials of the pillar region.

2. The electronic device of claim 1 , wherein the adjoining oxide materials directly contact the high-k dielectric material and the storage node segments.

3. The electronic device of claim 1 , wherein the adjoining oxide materials comprise a first oxide material adjacent to the conductive materials and a second oxide material adjacent to the first oxide material.

4. The electronic device of claim 3 , wherein the second oxide material directly contacts the storage node segments.

5. The electronic device of claim 3 , wherein the second oxide material separates the first oxide material from the storage node segments.

6. The electronic device of claim 3 , wherein the first oxide material directly contacts the high-k dielectric material adjacent to the conductive materials.

7. The electronic device of claim 3 , wherein the second oxide material surrounds the first oxide material.

8. The electronic device of claim 3 , wherein a length of the first oxide material in a vertical direction is shorter than a length of the second oxide material.

9. The electronic device of claim 1 , wherein the storage node segments are vertically adjacent to one another.

10. The electronic device of claim 1 , wherein a length of the storage node segments in a vertical direction is greater than a length of the adjoining oxide materials in the vertical direction.

11. An electronic device comprising:

an array of memory cells, the memory cells comprising:

stacks of alternating dielectric materials and conductive materials in a cell region of an electronic device; and

storage node segments adjacent to adjoining oxide materials in a pillar region of the electronic device, the storage node segments separated from one another by the dielectric materials of the stacks and the adjoining oxide materials comprising a first oxide material and a second oxide material, wherein a length of the storage node segments is less than a length of the adjoining oxide materials in a vertical direction; and

access lines and bit lines electrically coupled to the memory cells.

12. The electronic device of claim 11 , wherein a length of the first oxide material in a vertical direction is substantially the same as a length of the second oxide material in the vertical direction.

13. The electronic device of claim 11 , wherein the first oxide material and the second oxide material are substantially coextensive.

14. The electronic device of claim 11 , wherein the dielectric materials are vertically adjacent to the storage node segments.

15. A system, comprising:

a processor operably coupled to an input device and an output device; and

an electronic device operably coupled to the processor, the electronic device comprising memory cells, one or more of the memory cells comprising:

stacks of alternating dielectric materials and conductive materials in a cell region of the electronic device;

adjoining oxide materials between the conductive materials in the cell region and storage node segments in a pillar region of the electronic device, the storage node segments vertically adjacent to one another; and

a first high-k dielectric material adjacent to a second high-k dielectric material,

wherein the first high-k dielectric material extends in a horizontal direction and is adjacent to the adjoining oxide materials, and

wherein the second high-k dielectric material is adjacent to at least three sides of the conductive materials.

16. The system of claim 15 , wherein the storage node segments are separated from one another by a portion of a tunnel region.

17. The system of claim 15 , wherein the storage node segments are separated from one another by dielectric materials of the stacks.