IP Library › Granted Patent US 11,282,428
Granted Patent B2
US 11,282,428 · App. 17/013,191 · Granted Mar 22, 2022

Display panel including at least part of a gate driving circuit arranged in a display region, and organic light-emitting diode display device using the same

Inventors: In-Hyo Han (Paju-si, KR); Ki-Min Son (Paju-si, KR); Kil-Hwan Oh (Paju-si, KR); Hae-Jin Park (Paju-si, KR); Kyung-Min Kim (Paju-si, KR)
G09G3/20G09G3/3225G09G3/3233G09G3/3266G09G3/3275H01L27/0248H01L27/3262H01L27/3276H01L51/5237G09G2300/023G09G2300/0408G09G2300/0426G09G2300/0452G09G2310/0251G09G2310/0281G09G2310/0286G09G2310/08G09G2330/021G09G2330/04G09G2330/06G09G2380/02H01L27/1214H01L27/3213
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Quick Facts
Patent No.
US 11,282,428
App. No.
17/013,191
Granted
Mar 22, 2022
Kind
B2
Abstract

The display panel includes an active region including data lines, gate lines crossing the data lines, and pixels arranged in a matrix, and a shift register arranged distributively in the active region and configured to supply a gate pulse to the gate lines.

Claims (71)

1. A display panel, comprising:

a display region including data lines, gate lines crossing the data lines, and pixels arranged in a matrix; and

a gate driving circuit arranged distributively in the display region and configured to supply a gate pulse to the gate lines,

wherein each of the pixels includes a plurality of subpixels having different colors,

at least one of the subpixels is divided into a first circuit unit for driving a light-emitting element and a second circuit unit including a part of the gate driving circuit,

the first circuit unit and the second circuit unit are covered by an anode of the light-emitting element formed on the first circuit unit and the second circuit unit,

the light-emitting element includes the anode formed on transistors of the first circuit unit and transistors of the second circuit unit, an organic compound layer deposited on the anode, and a cathode formed on the organic compound layer, and

light emitted from the organic compound layer is reflected from the anode and is externally emitted through the cathode.

2. The display panel according to claim 1 , wherein transistors and data lines constituting the first circuit unit are spatially separated from transistors and clock wirings constituting the second circuit unit.

3. The display panel according to claim 1 , wherein a size of a pattern of the anode is larger than a size of the first circuit unit.

4. The display panel according to claim 3 , wherein the pattern of the anode formed on the first circuit unit and the second circuit unit is continuously connected.

5. The display panel according to claim 1 , wherein a size of a pattern of the anode and a size of a pattern of the organic compound layer are larger than the first circuit unit.

6. The display panel according to claim 5 , wherein each of the pattern of the anode and the pattern of the organic compound layer of the light-emitting element formed on the first circuit unit and the second circuit unit is continuously connected.

7. The display panel according to claim 1 , wherein the second circuit unit includes:

a pull-up transistor for raising a voltage of the gate pulse;

a Q node connected to a gate of the pull-up transistor;

an output terminal through which the gate pulse is output; and

a capacitor connected between the Q node and the output terminal,

wherein the capacitor is arranged on a corresponding gate line.

8. The display panel according to claim 7 , wherein the Q node is arranged on the corresponding gate line.

9. The display panel according to claim 1 , wherein the second circuit unit includes:

a pull-up transistor for raising a voltage of the gate pulse;

a Q node connected to a gate of the pull-up transistor;

a pull-down transistor for lowering the voltage of the gate pulse;

a Qb node connected to a gate of the pull-down transistor;

an output terminal formed between the pull-up transistor and the pull-down transistor, wherein the gate pulse is output through the output terminal; and

a capacitor connected between the Q node and the output terminal,

wherein the Q node and Qb node are arranged on a corresponding gate line.

10. The display panel according to claim 9 , wherein the capacitor is arranged on the corresponding gate line.

11. The display panel according to claim 1 , further comprising:

a data driving circuit configured to supply a data voltage to the data lines.

12. A display panel, comprising:

an active display region including data lines, gate lines crossing the data lines, and pixels arranged in a matrix;

a gate driving circuit arranged distributively in the display region and configured to supply a gate pulse to the gate lines; and

an electrostatic discharge protection element connected to the data lines and the gate lines,

wherein each of the pixels includes a plurality of subpixels having different colors,

the pixels include a first subpixel divided into a first circuit unit for driving a first light-emitting element and a second circuit unit including a part of the gate driving circuit, a second subpixel divided into a third circuit unit for driving a second light-emitting element and a fourth circuit unit including the electrostatic discharge protection element,

the first circuit unit and the second circuit unit are covered by a first anode of the first light-emitting element formed on the first circuit unit and the second circuit unit; and

the third circuit unit and the fourth circuit unit are covered by a second anode of the second light-emitting element formed on the third circuit unit and the fourth circuit unit.

13. The display panel according to claim 12 ,

wherein the first light-emitting element includes the first anode arranged on transistors of the first circuit unit and transistors of the second circuit unit, a first organic compound layer deposited on the first anode, and a first cathode arranged on the first organic compound layer, and

wherein the second light-emitting element includes the second anode arranged on transistors of the third circuit unit and transistors of the fourth circuit unit, a second organic compound layer deposited on the second anode, and a second cathode arranged on the second organic compound layer,

light emitted from the first and second organic compound layers is reflected from the first and second anodes and is externally emitted through the first and second cathodes.

14. The display panel according to claim 13 , wherein a size of a pattern of the first anode is larger than a size of the first circuit unit, and

wherein a size of a pattern of the second anode is larger than a size of the third circuit unit.

15. The display panel according to claim 12 , wherein the second circuit unit includes:

a pull-up transistor for raising a voltage of the gate pulse;

a Q node connected to a gate of the pull-up transistor;

an output terminal through which the gate pulse is output; and

a capacitor connected between the Q node and the output terminal,

wherein the capacitor is arranged on a corresponding gate line.

16. The display panel according to claim 15 , wherein the Q node is arranged on the corresponding gate line.

17. The display panel according to claim 12 , wherein the second circuit unit includes:

a pull-up transistor for raising a voltage of the gate pulse;

a Q node connected to a gate of the pull-up transistor;

a pull-down transistor for lowering the voltage of the gate pulse;

a Qb node connected to a gate of the pull-down transistor;

an output terminal formed between the pull-up transistor and the pull-down transistor, wherein the gate pulse is output through the output terminal; and

a capacitor connected between the Q node and the output terminal,

wherein the Q node and Qb node are arranged on a corresponding gate line.

18. The display panel according to claim 17 , wherein the capacitor is arranged on the corresponding gate line.

19. An Organic Light-Emitting Diode (OLED) display device, comprising:

a display region including data lines, gate lines crossing the data lines, and pixels arranged in a matrix;

a data driving circuit configured to supply a data voltage to the data lines;

a gate driving circuit configured to sequentially supply a gate pulse to the gate lines; and

an electrostatic discharge protection element connected to the data lines and the gate lines,

wherein the gate driving circuit is arranged distributively in the display region and configured to supply a gate pulse to the gate lines; and

each of the pixels includes a plurality of subpixels having different colors,

the subpixels include a first subpixel divided into a first circuit unit for driving a first light-emitting element and a second circuit unit including a part of the gate driving circuit, a second subpixel divided into a third circuit unit for driving a second light-emitting element and a fourth circuit unit including the electrostatic discharge protection element,

the first circuit unit and the second circuit unit are covered by an anode of the first light-emitting element formed on the first circuit unit and the second circuit unit; and

the third circuit unit and the fourth circuit unit are covered by an anode of the second light-emitting element formed on the third circuit unit and the fourth circuit unit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 8, 2020
From: HAN, IN-HYO; SON, KI-MIN; OH, KIL-HWAN; PARK, HAE-JIN; KIM, KYUNG-MIN
To: LG DISPLAY CO., LTD.
Reel/Frame 053709/0547 →
Priority Claims (2)
KR 10-2016-0151960 · Nov 15, 2016 · national
KR 10-2017-0125355 · Sep 27, 2017 · national
Continuity (2)
Division 15809806 · Nov 10, 2017
Related Publication 20200403051A1 · Dec 24, 2020