System and device including memristor materials in parallel
A system may include a first conductive plate configured at least to receive an input signal and a second conductive plate configured at least to output an output signal. The system may further include a first memristor material positioned between the first conductive plate and the second conductive plate. The system may further include a second memristor material positioned between the first conductive plate and the second conductive plate. The first memristor material and the second memristor material may be in parallel electrically. The first memristor material may be different from the second memristor material.
1. A system, comprising:
a memristor, comprising:
a first conductive plate configured at least to receive an input signal;
a second conductive plate configured at least to output an output signal;
a first memristor material positioned between the first conductive plate and the second conductive plate;
a second memristor material positioned between the first conductive plate and the second conductive plate, the first memristor material and the second memristor material being in parallel electrically, the first memristor material being different from the second memristor material; and
a barrier material, the barrier material extending from the first conductive plate to the second conductive plate, the barrier material positioned between the first memristor material and the second memristor material such that the first memristor material is not in contact with the second memristor material, wherein the barrier material is a fuse configured to permanently configure the memristor.
2. The system of claim 1 , further comprising an integrated circuit (IC), the IC comprising the memristor.
3. The system of claim 2 , wherein the IC is at least one of a non-volatile memory device or a radio frequency (RF) tuning device.
4. The system of claim 1 , wherein the first memristor material has a first current-voltage (I-V) curve, wherein the second memristor material has a second I-V curve, wherein the memristor has a third I-V curve, wherein each of the first, second, and third I-V curves is different.
5. The system of claim 4 , wherein the third I-V curve is indicative of an asymmetric time-based response.
6. The system of claim 5 , wherein the asymmetric time-based response is a homogenous asymmetric time-based response.
7. The system of claim 5 , wherein the asymmetric time-based response is a compartmentalized asymmetric time-based response.
8. The system of claim 5 , wherein the output signal has a signature based at least on the asymmetric time-based response.
9. The system of claim 8 , wherein the signature of the output signal is indicative of at least one of an identity or an authenticity of an electronic component.
10. The system of claim 8 , further comprising a circuit configured to use the signature of the output signal for at least one of: anti-piracy, cyber security authentication, unique data storage, or usage temperature authentication.
11. The system of claim 1 , wherein the fuse is activated thermally.
12. A method, comprising:
providing a first conductive plate configured to receive an input signal;
providing a second conductive plate configured to output an output signal;
providing a first memristor material positioned between the first conductive plate and the second conductive plate;
providing a second memristor material positioned between the first conductive plate and the second conductive plate, the first memristor material and the second memristor material being in parallel electrically, the first memristor material being different from the second memristor material;
providing a barrier material, the barrier material extending from the first conductive plate to the second conductive plate, the barrier material positioned between the first memristor material and the second memristor material such that the first memristor material is not in contact with the second memristor material, wherein the barrier material is a fuse configured to permanently configure the memristor; and
providing a memristor, the memristor comprising the first conductive plate, the second conductive plate, the first memristor material, the second memristor, and the barrier material.