Circuit board with spaces for embedding components
Various embodiments described herein provide for printed circuit boards with one or more spaces for embedding components, which can be used to implement a memory sub-system.
1. A memory sub-system comprising:
a printed circuit board comprising:
an outer layer that comprises a first exterior surface; and
a set of embedded spaces, each embedded space having a second exterior surface that is positioned closer to a center of the printed circuit board than the first exterior surface; and
a set of components disposed on the printed circuit board at the set of embedded spaces, the set of components comprising:
a set of memory devices for storing data from a host system; and
a memory sub-system controller operatively coupled to the set of memory devices, the memory sub-system controller enabling data transfer between the set of memory devices and the host system.
2. The memory sub-system of claim 1 , wherein at least one component of the set of components has a first coefficient of thermal expansion that is lower than a second coefficient of thermal expansion of the printed circuit board.
3. The memory sub-system of claim 1 , wherein a first component of the set of components is disposed on the printed circuit board at a first embedded space of the set of embedded spaces, and wherein the first component is disposed at the first embedded space by solder that couples a first side of the first component to the second exterior surface of the first embedded space.
4. The memory sub-system of claim 1 , wherein a first component of the set of components is disposed on the printed circuit board at a first embedded space of the set of embedded spaces, wherein a first side of the first component couples to the second exterior surface of the first embedded space, and wherein dimensions of the first embedded space allows for the first embedded space to receive the first side of the first component.
5. The memory sub-system of claim 1 , wherein a first component of the set of components is disposed on the printed circuit board at a first embedded space of the set of embedded spaces, and wherein a depth of the second exterior surface of the first embedded space, relative to the first exterior surface, is sufficient to embed a set of interconnects of the first component into the outer layer.
6. The memory sub-system of claim 1 , wherein a first component of the set of components is disposed on the printed circuit board at a first embedded space of the set of embedded spaces, and wherein a depth of the second exterior surface of the first embedded space, relative to the first exterior surface, is sufficient to embed an outer package the first component into the outer layer.
7. The memory sub-system of claim 1 , wherein at least one component of the set of components comprises a surface-mounted integrated circuit package.
8. The memory sub-system of claim 1 , wherein the printed circuit board conforms with at least one of a solid-state drive (SSD) M.2 form factor or a solid-state drive (SSD) U.2 form factor.
9. The memory sub-system of claim 1 , wherein the set of memory devices comprises at least one of NAND-based memory device or a dynamic random access memory (DRAM) device.
10. The memory sub-system of claim 1 , wherein the printed circuit board comprises at least one route disposed below at least one embedded space of the set of embedded spaces.
11. The memory sub-system of claim 1 , wherein the printed circuit board comprises a single-sided printed circuit board.
12. A method comprising:
forming a printed circuit board for a memory sub-system, the printed circuit board comprising an outer layer that comprises:
a first exterior surface; and
a set of embedded spaces, each embedded space having a second exterior surface that is positioned closer to a center of the printed circuit board than the first exterior surface; and
disposing a set of components on the printed circuit board at the set of embedded spaces, the set of components comprising:
a set of memory devices for storing data from a host system; and
a memory sub-system controller operatively coupled to the set of memory devices, the memory sub-system controller enabling data transfer between the set of memory devices and the host system.
13. The method of claim 12 , wherein the forming the printed circuit board comprising:
prior to forming the outer layer of the printed circuit board, disposing a set of placeholder components on an intermediate layer of the printed circuit board;
forming the outer layer on the intermediate layer of the printed circuit board; and
removing the set of placeholder components to form the set of embedded spaces in the outer layer of the printed circuit board.
14. The method of claim 12 , wherein the forming the printed circuit board comprising:
forming the outer layer on an intermediate layer of the printed circuit board; and
etching a set of portions of the outer layer to form the set of embedded spaces.
15. The method of claim 12 , wherein the disposing the set of components on the printed circuit board at the set of embedded spaces comprises:
coupling a first component of the set of components to the second exterior surface of a first embedded space of the set of embedded spaces.
16. The method of claim 15 , wherein the coupling the first component to the second exterior surface of the first embedded space comprises:
soldering a set of interconnects of the first component to a set of connections disposed on the second exterior surface of the first embedded space.
17. The method of claim 15 , wherein the coupling the first component to the second exterior surface of the first embedded space comprises:
soldering a set of interconnects of the first component to a set of traces disposed along an edge of the first embedded space.
18. The method of claim 12 , wherein at least one component of the set of components has a first coefficient of thermal expansion that is lower than a second coefficient of thermal expansion of the printed circuit board.
19. The method of claim 12 , wherein the printed circuit board conforms with at least one of a solid-state drive (SSD) U.2 form factor, a solid-state drive (SSD) M.2, form factor or a dual in-line memory module (DIMM) form factor.
20. A dual in-line memory module comprising:
a printed circuit board comprising:
an outer layer that comprises a first exterior surface; and
a set of embedded spaces, each embedded space having a second exterior surface that is positioned closer to a center of the printed circuit board than the first exterior surface; and
a set of components disposed on the printed circuit board at the set of embedded spaces, the set of components comprising:
a set of memory devices for storing data from a host system; and
a memory sub-system controller operatively coupled to the set of memory devices, the memory sub-system controller enabling data transfer between the set of memory devices and the host system.