Information processing apparatus
View Patent ↗An information processing apparatus includes a thread scheduler that allocates a process to multiple process execution hardware that process a program having a graph structure. The information processing apparatus includes: a code reader that reads a diagnostic code stored in advance; and an allocator that causes the multiple process execution hardware to execute the diagnostic code so as to complete diagnosis within a mean time to failure.
1. An information processing apparatus comprising
a processor configured to:
allocate a process to a plurality of process execution hardware configured to process a program having a graph structure;
read a diagnostic code stored in advance; and
cause the plurality of process execution hardware to execute the diagnostic code,
wherein
the graph structure has a task parallelism of a program and a graph parallelism of the program.
2. The information processing apparatus according to claim 1 , wherein:
the processor is configured to read an expectation value of a result obtained by executing the diagnostic code stored in advance.
3. The information processing apparatus according to claim 1 , wherein:
an execution core includes the plurality of process execution hardware that are a plurality of arithmetic operation instruments.
4. The information processing apparatus according to claim 1 , wherein:
the processor is configured to allocate the diagnostic code to the plurality of process execution hardware so that each of the plurality of process execution hardware executes the diagnostic code at a different timing from each other.
5. The information processing apparatus according to claim 1 , wherein:
the processor is configured to cause another process execution hardware having an identical type to execute the diagnostic code again when an execution result of the diagnostic code shows a failure.