IP Library › Granted Patent US 12,131,934
Granted Patent B2
US 12,131,934 · App. 17/063,334 · Granted Oct 29, 2024

Semiconductor substrate support leveling apparatus

Inventors: Katherine Woo (Santa Clara, CA); Paul L. Brillhart (Pleasanton, CA); Jian Li (Fremont, CA); Shinnosuke Kawaguchi (Adachi-Ku, JP); David W. Groechel (Sunnyvale, CA); Dorothea Buechel-Rimmel (Sunnyvale, CA); Juan Carlos Rocha-Alvarez (San Carlos, CA); Paul E. Fisher (Los Altos, CA); Chidambara A. Ramalingam (Fremont, CA); Joseph J. Farah (Hollister, CA)
Assignee: Applied Materials, Inc.
H01L21/68G01L9/08H01J37/32724H04Q9/00H01J2237/20264H01L21/67103H01L21/6833H01L21/6838
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Quick Facts
Patent No.
US 12,131,934
App. No.
17/063,334
Granted
Oct 29, 2024
Kind
B2
Abstract

Exemplary semiconductor processing systems may include a chamber body including sidewalls and a base. The chamber body may define an interior volume. The systems may include a substrate support extending through the base of the chamber body. The substrate support may be configured to support a substrate within the interior volume. The systems may include a faceplate positioned within the interior volume of the chamber body. The faceplate may define a plurality of apertures through the faceplate. The systems may include a leveling apparatus seated on the substrate support. The leveling apparatus may include a plurality of piezoelectric pressure sensors.

Claims (13)

1. A semiconductor processing system comprising:

a chamber body comprising sidewalls and a base, the chamber body defining an interior volume;

a substrate support extending through the base of the chamber body, wherein the substrate support is configured to support a substrate within the interior volume;

a faceplate positioned within the interior volume of the chamber body, wherein the faceplate defines a plurality of apertures through the faceplate; and

a leveling apparatus seated on the substrate support, wherein the leveling apparatus comprises a plurality of piezoelectric pressure sensors compressibly coupled between two plates of the leveling apparatus, wherein the leveling apparatus is configured to identify parallelism between the substrate support and the faceplate when the leveling apparatus is contacted or compressed against the faceplate by the substrate support.

2. The semiconductor processing system of claim 1 , wherein each sensor of the plurality of piezoelectric pressure sensors comprise an antenna.

3. The semiconductor processing system of claim 2 , further comprising:

a transmitter disposed outside of the chamber body and configured to transmit an input signal to a transducer of each of the plurality of piezoelectric pressure sensors.

4. The semiconductor processing system of claim 3 , further comprising:

at least one receiver disposed outside of the chamber body and configured to receive an output signal from an antenna of each of the plurality of piezoelectric pressure sensors.

5. The semiconductor processing system of claim 4 , wherein the receiver is configured to compare an oscillation frequency shift of each sensor of the plurality of piezoelectric pressure sensors.

6. The semiconductor processing system of claim 1 , wherein the leveling apparatus comprises at least two piezoelectric pressure sensors compressibly coupled between two plates of the leveling apparatus.

7. The semiconductor processing system of claim 1 , wherein the piezoelectric pressure sensors comprise surface acoustic wave pressure sensors.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2021
From: WOO, KATHERINE; BRILLHART, PAUL L.; LI, JIAN; KAWAGUCHI, SHINNOSUKE; GROECHEL, DAVID W.; BUECHEL-RIMMEL, DOROTHEA; ROCHA-ALVAREZ, JUAN CARLOS; FISHER, PAUL E.; RAMALINGAM, CHIDAMBARA A.; FARAH, JOSEPH J.
To: APPLIED MATERIALS, INC.
Reel/Frame 056950/0251 →
Continuity (1)
Related Publication 20220108907A1 · Apr 7, 2022
Cited By (1)
US 12,455,119