IP Library Granted Patent US 11,354,428
Granted Patent B2
US 11,354,428 · App. 17/067,510 · Granted Jun 7, 2022

Data values encryption method

Inventors: Joan Daemen (Malden, NL); Gilles Van Assche (Woluwe-St-Lambert, BE)
Assignee: PROTON WORLD INTERNATIONAL N.V.
G06F21/602G06F21/72
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Quick Facts
Patent No.
US 11,354,428
App. No.
17/067,510
Granted
Jun 7, 2022
Kind
B2
Abstract

A method encrypts, using an encryption circuit, a first data value having a number n of first binary words, each word having a number m of bits. The encrypting includes generating a second data value having a same number n of second binary words of m bits each and outputting a result of the encryption. The number n is an integer greater than or equal to 3, m and n do not have a common integer division, and n or m is even. A second binary word of the second data value having a rank i is equal to a sum of: a first binary word having a same rank i; and a product of: a complement of a first binary word having rank ((i+1)modulo n), shifted by a first number of bit positions; and a first binary word having rank ((i+2)modulo n), shifted by a second number of bit positions.

Claims (73)

1. A method of protecting an electronic device during execution of an operation, the protecting comprising:

encrypting, using an encryption circuit, a first data value having a number n of first binary words, each word having a number m of bits, the encrypting including generating a second data value having a same number n of second binary words of m bits each; and

outputting a result of the encryption, wherein n is an integer greater than or equal to 3, m and n do not have a common integer division, n or m is even, and a second binary word of the second data value having a rank i is equal to a sum of:

a binary word of the first binary words having a same rank i; and

a product of:

a complement of a binary word of the first binary words having a rank ((i+1)modulo n), shifted by a first number of bit positions; and

a binary word of the first binary words having a rank ((i+2)modulo n), shifted by a second number of bit positions.

2. The method according to claim 1 , wherein the number of bits m is even.

3. The method according to claim 1 , wherein the first number of bit positions is equal to 1 bit position.

4. The method according to claim 1 , wherein the second number of bit positions is equal to 2 bit positions.

5. The method according to claim 1 , wherein the number n of binary words is equal to 5 binary words.

6. The method according to claim 1 , wherein the number of bits m is equal to 4 bits or equal to 64 bits.

7. The method according to claim 1 , wherein:

the sum is a bitwise sum;

the product is a bitwise product; and

the complement of a binary word is the bitwise complement of the binary word.

8. The method according to claim 1 , wherein the encrypting comprises applying a linear operation to the second data value.

9. The method according to claim 1 , wherein the encrypting comprises applying one or more linear operations.

10. The method according to claim 9 , wherein the one or more linear operations include a linear diffusion operation.

11. The method according to claim 9 , wherein the one or more linear operations include a binary word rotation operation.

12. The method according to claim 9 , wherein the one or more linear operations include an operation to add a revolution constant.

13. The method according to claim 9 , wherein the one or more linear operations include a binary-word bit shifting operation.

14. A device, comprising:

one or more memories; and

digital signal processing circuitry coupled to the one or more memories, which, in operation, protects data values used by the device, the protecting including encrypting a first data value having a number n of first binary words, each word having a number m of bits, the encrypting including generating a second data value having a same number n of second binary words of m bits each, wherein n is an integer greater than or equal to 3, m and n do not have a common integer division, nor m is even, and a second binary word of the second data value having a rank i is equal to a sum of:

a binary word of the first binary words having a same rank i; and

a product of:

a complement of a binary word of the first binary words having a rank ((i+1)modulo n), shifted by a first number of bit positions; and

a binary word of the first binary words having a rank ((i+2)modulo n), shifted by a second number of bit positions.

15. The device according to claim 14 , wherein the number of bits m is even.

16. The device according to claim 14 , wherein the first number of bit positions is equal to 1 bit position and the second number of bit positions is equal to 2 bit positions.

17. The device according to claim 14 , wherein the number n of binary words is equal to 5 binary words.

18. The device according to claim 14 , wherein:

the sum is a bitwise sum;

the product is a bitwise product; and

the complement of a binary word is the bitwise complement of the binary word.

19. A method, comprising:

executing an operation by an electronic circuit; and

protecting the electronic circuit during execution of the operation, the protecting including:

encrypting, using an encryption circuit, a first data value having a number n of first binary words, each word having a number m of bits, the encrypting including generating a second data value having a same number n of second binary words of m bits each, wherein n is an integer greater than or equal to 3, m and n do not have a common integer division, nor m is even, and a second binary word of the second data value having a rank i is equal to a sum of:

a binary word of the first binary words having a same rank i; and

a product of:

a complement of a binary word of the first binary words having a rank ((i+1)modulo n), shifted by a first number of bit positions; and

a binary word of the first binary words having a rank ((i+2)modulo n), shifted by a second number of bit positions.

20. The method according to claim 19 , wherein:

the sum is a bitwise sum;

the product is a bitwise product; and

the complement of a binary word is the bitwise complement of the binary word.

21. The method according to claim 19 , wherein the encrypting comprises applying one or more linear operations.

22. A system, comprising:

a functional circuit; and

digital signal processing circuitry coupled to the functional circuit, wherein the digital signal processing circuitry, in operation, encrypts a first data value having a number n of first binary words, each word having a number m of bits, the encrypting including generating a second data value having a same number n of second binary words of m bits each, wherein n is an integer greater than or equal to 3, m and n do not have a common integer division, norm is even, and a second binary word of the second data value having a rank i is equal to a sum of:

a binary word of the first binary words having a same rank i; and

a product of:

a complement of a binary word of the first binary words having a rank ((i+1)modulo n), shifted by a first number of bit positions; and

a binary word of the first binary words having a rank ((i+2)modulo n), shifted by a second number of bit positions, wherein the encrypting protects an operation of the functional circuit.

23. The system according to claim 22 , wherein:

the sum is a bitwise sum;

the product is a bitwise product; and

the complement of a binary word is the bitwise complement of the binary word.

24. A non-transitory computer-readable medium having contents which configure digital signal processing circuitry to perform a method, the method comprising:

executing an operation; and

protecting the digital signal processing circuitry during execution of the operation, the protecting including encrypting a first data value having a number n of first binary words, each word having a number m of bits, the encrypting including generating a second data value having a same number n of second binary words of m bits each, wherein n is an integer greater than or equal to 3, m and n do not have a common integer division, norm is even, and a second binary word of the second data value having a rank i is equal to a sum of:

a binary word of the first binary words having a same rank i; and

a product of:

a complement of a binary word of the first binary words having a rank ((i+1)modulo n), shifted by a first number of bit positions; and

a binary word of the first binary words having a rank ((i+2)modulo n), shifted by a second number of bit positions.

25. The non-transitory computer-readable medium according to claim 24 , wherein:

the sum is a bitwise sum;

the product is a bitwise product; and

the complement of a binary word is the bitwise complement of the binary word.

26. The non-transitory computer-readable medium according to claim 24 , wherein the contents comprise instructions executed by the digital signal processing circuitry.

27. The non-transitory computer-readable medium according to claim 24 , wherein the contents comprise a look-up table storing a first set of data values to be encrypted and a corresponding second set of data values.

Assignments (2)
CHANGE OF NAME Recorded Sep 26, 2024
From: PROTON WORLD INTERNATIONAL
To: STMICROELECTRONICS BELGIUM
Reel/Frame 069057/0620 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2020
From: DAEMEN, JOAN; VAN ASSCHE, GILLES
To: PROTON WORLD INTERNATIONAL N.V.
Reel/Frame 054026/0777 →
Priority Claims (1)
FR 1911404 · Oct 14, 2019 · national
Continuity (1)
Related Publication 20210110050A1 · Apr 15, 2021