Synchronous buck inverter
A power inverter, such as a synchronous buck power inverter, that is configured with a high frequency switching control having a (PWM) controller and sensing circuit. Controller provides a low frequency oscillating wave to effect switching control on a synchronous-buck circuit portion that includes a plurality of switches to invert every half cycle of the frequency provided by controller. The inverting process thus creates a positive and negative transition of the oscillating wave signal. A low frequency switching stage includes a further plurality of switches configured to operate as zero voltage switching (ZVS) and zero current switching (ZCS) drives Charge on an output capacitor is discharged to zero on every zero crossing of low frequency switching stage and advantageously discharges energy every half cycle. During this discharge of energy, the zero crossing distortion in the low frequency sine wave is greatly reduced.
1. An inverter, comprising:
a high frequency switching control circuit operatively coupled to a DC power input;
a synchronous-buck circuit, operatively coupled to the high frequency switching control circuit and comprising a plurality of switches controlled by the high frequency switching control circuit to cyclically invert the DC power input; and
a low frequency switching circuit for providing an oscillated output and operatively coupled to the synchronous buck circuit to provide zero voltage switching and zero current switching by driving an output capacitor circuit to discharge on each zero crossing of the low frequency switching circuit.
2. The inverter according to claim 1 , wherein the high frequency switching control circuit comprises a controller and a sensing circuit.
3. The inverter according to claim 2 , wherein the controller comprises a current-mode PWM controller.
4. The inverter according to claim 2 , wherein the sensing circuit comprises at least one of a peak current sense and an output voltage sense.
5. The inverter according to claim 1 , wherein the plurality of switches for the synchronous-buck circuit comprise field effect transistors (FETs).
6. The inverter according to claim 1 , wherein the high frequency switching control circuit is configured to provide a low frequency sine wave to effect switching control on the synchronous-buck circuit.
7. The inverter according to claim 1 , wherein the synchronous buck circuit comprises a plurality of drive circuits, each operatively coupled to a respective one of the plurality of switches.
8. The inverter according to claim 1 , wherein one of the plurality of switches for the synchronous-buck circuit is configured to be active on a high frequency PWM for a positive half wave of the high frequency switching control circuit, and another of the plurality of switches for the synchronous-buck circuit is active on a high frequency PWM complement for the positive half wave of the high frequency switching control circuit.
9. The inverter according to claim 1 , wherein one of the plurality of switches for the synchronous-buck circuit is configured to be active on a high frequency PWM for a negative half wave of the high frequency switching control circuit, and another of the plurality of switches for the synchronous-buck circuit is active on a high frequency PWM complement for the negative half wave of the high frequency switching control circuit.
10. The inverter according to claim 1 , further comprising a dither circuit operatively coupled to the high frequency switching control circuit, wherein the dither circuit is configured to cause a frequency change in the switching control circuit.
11. The inverter according to claim 10 , wherein the dithering circuit is configured to apply a waveform to the high frequency switching control circuit to cause the frequency change.
12. The inverter according to claim 11 , wherein the dithering circuit is configured to apply a triangular waveform to the high frequency switching control circuit to cause the frequency change.
13. The inverter according to claim 10 , wherein the dither circuit is configured to cause the frequency change in the switching control circuit by reducing a switching frequency at a zero crossing.
14. The inverter according to claim 1 , wherein each of the plurality of switches for the synchronous buck circuit comprises one of Silicon Carbide switches and Gallium Nitride switches.
15. The inverter of claim 1 , wherein the output capacitor circuit comprises a discharge capacitor operatively coupled to the oscillated output, the low frequency switching circuit and the synchronous buck circuit.
16. The inverter according to claim 1 , wherein the high frequency switching control circuit is configured to provide a high frequency sine wave to effect switching control on the synchronous-buck circuit.
17. The inverter according to claim 15 , wherein the synchronous buck circuit comprises a plurality of drive circuits.
18. The inverter according to claim 1 , wherein the low frequency switching circuit comprises a plurality of drive circuits.
19. The inverter according to claim 1 , wherein one aspect of the low frequency switching circuit is configured to be always on for one half wave of the high frequency switching control circuit, and another aspect of the low frequency switching circuit is always off for the one half wave of the low frequency switching circuit.