IP Library › Granted Patent US 11,527,659
Granted Patent B2
US 11,527,659 · App. 17/069,875 · Granted Dec 13, 2022

Semiconductor device and manufacturing method thereof

Inventors: Ming-Yang Li (Hsinchu, TW); Lain-Jong Li (Hsinchu, TW); Han Yeh (Hsinchu County, TW); Wen-Hao Chang (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L29/78696H01L23/142H01L23/544H01L29/517
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Quick Facts
Patent No.
US 11,527,659
App. No.
17/069,875
Granted
Dec 13, 2022
Kind
B2
Abstract

A semiconductor device includes channel region, first and second two-dimensional metallic contacts, a gate structure, and first and second metal contacts. The channel region includes a two-dimensional semiconductor material. The first two-dimensional metallic contact is disposed at a side of the channel region and includes a two-dimensional metallic material. The second two-dimensional metallic contact is disposed at an opposite side of the channel region and includes the two-dimensional metallic material. The gate structure is disposed on the channel region in between the first and second two-dimensional metallic contacts. The first metal contact is disposed at an opposite side of the first two-dimensional metallic contact with respect to the channel region. The second metal contact is disposed at an opposite side of the second two-dimensional metallic contact with respect to the channel region. The first and second two-dimensional metallic contacts contact sideways the channel region to form lateral semiconductor-metallic junctions.

Claims (44)

1. A semiconductor device, comprising:

a substrate;

a channel region disposed on the substrate and comprising a two-dimensional semiconductor material;

a first two-dimensional metallic contact disposed over the substrate, at a side of the channel region and comprising a two-dimensional metallic material;

a second two-dimensional metallic contact disposed on the substrate, at an opposite side of the channel region and comprising the two-dimensional metallic material;

a gate structure, disposed on the channel region in between the first two-dimensional metallic contact and the second two-dimensional metallic contact;

a first metal contact disposed at an opposite side of the first two-dimensional metallic contact with respect to the channel region;

a second metal contact disposed at an opposite side of the second two-dimensional metallic contact with respect to the channel region;

a first layer disposed between the first metal contact and the substrate and comprising the two-dimensional semiconductor material, wherein the first two-dimensional metallic contact is disposed between the first layer and the channel region; and

a second layer disposed between the second metal contact and the substrate and comprising the two-dimensional semiconductor material, wherein the second two-dimensional metallic contact is disposed between the second layer and the channel region,

wherein the first two-dimensional metallic contact and the second two-dimensional metallic contact laterally contact the channel region to form lateral semiconductor-metallic junctions.

2. The semiconductor device of claim 1 , wherein the first two-dimensional metallic contact comprises vertically stacked monolayers of the two-dimensional metallic material, and a number of monolayers of the two-dimensional metallic material in the first two-dimensional metallic contact is greater than a number of monolayers of two-dimensional semiconductor material in the channel region.

3. The semiconductor device of claim 2 , wherein a bottommost monolayer of the monolayers of the two-dimensional semiconductor material and a bottommost monolayer of the monolayers of the two-dimensional metallic material are horizontally aligned.

4. The semiconductor device of claim 2 , wherein the channel region includes a single monolayer of the two-dimensional semiconductor material.

5. The semiconductor device of claim 2 , wherein the two-dimensional semiconductor material and the two-dimensional metallic material have a same chemical composition, and a thickness-modulated switchable material is used as the two-dimensional semiconductor material and as the two-dimensional metallic material.

6. The semiconductor device of claim 5 , wherein the thickness-modulated switchable material includes at least one selected from PtSe 2 , PdSe 2 , and PtTe 2 .

7. The semiconductor device of claim 2 , wherein the number of the monolayers of the two-dimensional metallic material in the first two-dimensional metallic contact is greater than a number of monolayers of the two-dimensional semiconductor material in the first layer.

8. The semiconductor device of claim 1 , wherein the first metal contact laterally contacts the first two-dimensional metallic contact to form a lateral metal-metallic junction, and the second metal contact laterally contacts the second two-dimensional metallic contact to form another lateral metal-metallic junction.

9. A semiconductor device, comprising:

a substrate;

a strip of a two-dimensional semiconductor material disposed on the substrate;

layers of a two-dimensional metallic material disposed over the substrate in stacks at opposite sides of the strip;

metal blocks, extending on outer sidewalls of the stacks of the layers of the two-dimensional metallic material;

a gate structure, disposed on the strip of the two-dimensional semiconductor material in between the stacks of the layers of the two-dimensional metallic material; and

additional strips of the two-dimensional semiconductor material disposed between the metal blocks and the substrate,

wherein the layers of the two-dimensional metallic material are interposed between the additional strips of the two-dimensional semiconductor material having the metal blocks disposed thereon and the strip of the two-dimensional semiconductor material having the gate structure disposed thereon, and

wherein the strip of two-dimensional semiconductor material extends on the substrate along a first direction and a second direction perpendicular to the first direction, and semiconductor-metallic junctions between the layers of the two-dimensional metallic material and the strip of the two-dimensional semiconductor material extend along at least one direction selected from the first direction and the second direction and along a third direction perpendicular to the first direction and the second direction.

10. The semiconductor device of claim 9 , wherein the two-dimensional semiconductor material and the two-dimensional metallic material have different chemical compositions.

11. The semiconductor device of claim 10 , wherein the layers of the two-dimensional metallic material are disposed directly on the substrate.

12. The semiconductor device of claim 9 , wherein the layers of the two-dimensional metallic material are disposed on the strip of the two-dimensional semiconductor material.

13. The semiconductor device of claim 9 , wherein the metal contacts are in contact with the additional strips of the two-dimensional semiconductor material.

14. The semiconductor device of claim 9 , wherein inner sidewalls of the layers of the two-dimensional metallic material extend along the same directions as the semiconductor-metallic junctions.

15. The semiconductor device of claim 9 , wherein the metal blocks further extend on top surfaces of the stacks of the layers of the two-dimensional metallic material.

16. The semiconductor device of claim 9 , wherein a thickness of the stacks of the layers of two-dimensional metallic material is greater than a thickness of the strip of two-dimensional semiconductor material.

17. A manufacturing method of a semiconductor device, comprising:

forming a sheet of a two-dimensional semiconductor material on a substrate;

forming stacked layers of two-dimensional metallic material at opposite sides of the two-dimensional semiconductor material by forming mask strips separated by trenches on the sheet of the two-dimensional semiconductor material, and growing the stacked layers of two-dimensional metallic material in the trenches, wherein a thickness of the stacked layers of two-dimensional metallic material is greater than a thickness of the sheet of two-dimensional semiconductor material, and semiconductor-metallic junctions extend parallel to inner sidewalls of the stacked layers of two-dimensional metallic material;

patterning the sheet of the two-dimensional semiconductor material to form a strip of the two-dimensional semiconductor material;

disposing a metal material over the substrate, wherein the metal material extends on outer sidewalls of the stacked layers of two-dimensional metallic material, and the outer sidewalls are opposite to the inner sidewalls; and

forming a gate structure on the strip of the two-dimensional semiconductor material, wherein the gate structure contacts the inner sidewalls of the stacked layers of two-dimensional metallic material,

wherein the sheet of the two-dimensional semiconductor material includes a thickness-modulated switchable material, and growing the stacked layers of two-dimensional metallic material comprises disposing additional thickness-modulated switchable material on the sheet of the two-dimensional semiconductor material in the trenches.

18. The manufacturing method of claim 17 , wherein forming the strip of the two-dimensional semiconductor material comprises patterning the sheet of the two-dimensional semiconductor material to form parallel strips of the two-dimensional semiconductor material separated by trenches.

19. The manufacturing method of claim 17 , wherein patterning the sheet of the two-dimensional semiconductor material comprises removing portions of the sheet of the two-dimensional semiconductor material at bottoms of the trenches, wherein the stacked layers of two-dimensional metallic material are formed in the trenches after removing the portions of the sheet of the two-dimensional semiconductor material, thus contacting side-by-side the strip of the two-dimensional semiconductor material.

20. The manufacturing method of claim 17 , wherein the thickness-modulated switchable material includes at least one selected from PtSe 2 , PdSe 2 , and PtTe 2 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2020
From: LI, MING-YANG; LI, LAIN-JONG; YEH, HAN; CHANG, WEN-HAO
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 054329/0114 →
Continuity (1)
Related Publication 20220115541A1 · Apr 14, 2022
Cited By (1)
US 12,557,345