IP Library › Granted Patent US 11,356,117
Granted Patent B2
US 11,356,117 · App. 17/071,607 · Granted Jun 7, 2022

Transmitting apparatus and signal processing method thereof

Inventors: Hong-sil Jeong (Suwon-si, KR); Se-ho Myung (Yongin-si, KR); Kyung-joong Kim (Seoul, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H03M13/1102H03M13/036H03M13/1165H03M13/255H03M13/271H03M13/2707H03M13/2778H03M13/356H04L1/0041H04L1/0058H04L1/0071
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Quick Facts
Patent No.
US 11,356,117
App. No.
17/071,607
Granted
Jun 7, 2022
Kind
B2
Abstract

A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding, an interleaver configured to interleave the LDPC codeword, and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver performs interleaving by dividing the LDPC codeword into a plurality of groups, rearranging an order of the plurality of groups in group units, and dividing the plurality of rearranged groups based on a modulation order according to the modulation method.

Claims (17)

1. A transmitting apparatus comprising:

an interleaver configured to interleave a codeword; and

a constellation mapper configured to map bits of the interleaved codeword onto constellation points based on 256-quadrature amplitude modulation (QAM),

wherein the interleaver comprises:

a block interleaver configured to interleave bits of the codeword using a plurality of columns, each of the plurality of columns comprising a first part and a second part, and

wherein if a length of the codeword is 64800 bits, a number of bits to be written in the first part of the each of the plurality of columns is 7920 and a number of bits to be written in the second part of the each of the plurality of columns is 180, and

wherein if the length of the codeword is 16200 bits, the number of the bits to be written in the first part of the each of the plurality of columns is 1800 and the number of the bits to be written in the second part of the each of the plurality of columns is 225.

2. The transmitting apparatus claimed in claim 1 , wherein the codeword comprises input bits and parity bits, and

wherein the parity bits are generated by encoding the input bits based on a low density parity check (LDPC) code.

3. A receiving apparatus comprising:

a demodulator configured to demodulate a signal received from a transmitting apparatus to generate values based on 256-quadrature amplitude modulation (QAM);

a deinterleaver configured to deinterleave the values using a plurality of columns, each column of the plurality of columns comprising a first part and a second part; and

a decoder configured to decode the deinterleaved values based on a low density parity check (LDPC) code,

wherein if a code length of the LDPC code is 64800 bits, a number of rows in the first part of the each column is 7920, and a number of rows in the second part of the each column is 180, and

wherein if the code length of the LDPC code is 16200 bits, the number of the rows in the first part of the each column is 1800 and the number of the rows in the second part of the each column is 225.

4. The receiving apparatus claimed in claim 3 , wherein the deinterleaver is configured to split the deinterleaved values into a plurality of groups, and deinterleave the plurality of groups, and

wherein the decoder is configured to decode values of the deinterleaved plurality of groups based on the LDPC code.

Priority Claims (1)
KR 10-2014-0134505 · Oct 6, 2014 · national
Continuity (5)
Continuation 16363675 · Mar 25, 2019
Continuation 15417911 · Jan 27, 2017
Continuation 14506771 · Oct 6, 2014
Provisional Application 61886827 · Oct 4, 2013
Related Publication 20210036715A1 · Feb 4, 2021