IP Library Granted Patent US 11,417,529
Granted Patent B2
US 11,417,529 · App. 17/072,622 · Granted Aug 16, 2022

Plasma-based edge terminations for gallium nitride power devices

Inventors: Yuji Zhao (Chandler, AZ); Houqiang Fu (Tempe, AZ); Kai Fu (Tempe, AZ)
Assignee: Arizona Board of Regents on behalf of Arizona State University
H01L21/3006H01L21/3245H01L23/585H01L29/2003H01L29/66136H01L29/66204H01L29/861
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Quick Facts
Patent No.
US 11,417,529
App. No.
17/072,622
Granted
Aug 16, 2022
Kind
B2
Abstract

A p-n diode includes a first electrode, a n-GaN layer on the first electrode, a p-GaN layer on the n-GaN layer, and a second electrode on a first portion of the p-GaN layer. A region of the p-GaN layer surrounding the electrode is a passivated region. Treating a GaN power device having a p-GaN layer includes covering a portion of the p-GaN layer with a metal layer, exposing the p-GaN layer to a hydrogen plasma, and thermally annealing the p-GaN layer, thereby passivating a region of the p-GaN layer proximate the metal layer.

Claims (15)

1. A method of treating a GaN power device comprising a p-GaN layer, the method comprising:

covering a portion of the p-GaN layer with a metal layer;

exposing the p-GaN layer to a hydrogen plasma;

thermally annealing the p-GaN layer, thereby passivating a region of the p-GaN layer proximate the metal layer; and

covering an additional portion of the p-GaN layer with an additional metal layer separated from the metal layer on a surface of the p-GaN layer,

wherein thermally annealing the p-GaN layer comprises passivating a region of the p-GaN layer between the metal layer and the additional metal layer.

2. The method of claim 1 , wherein thermally annealing the p-GaN layer comprises heating the p-GaN layer to a temperature in a range between 350° C. and 500° C.

3. The method of claim 1 , wherein passivating the p-GaN layer comprises passivating all of the p-GaN layer into highly resistant-GaN (HR-GaN).

4. The method of claim 3 , wherein the HR-GaN is an edge termination for the GaN power device.

5. The method of claim 1 , wherein the metal layer is in the form of a metal circle, and the additional metal layer is a metal ring surrounding the circle.

6. The method of claim 5 , wherein passivating the region of the p-GaN layer proximate the metal layer comprises passivating a region between the metal circle and the metal ring.

7. The method of claim 6 , wherein the region between the metal circle and the metal ring is a guard ring.

8. The method of claim 7 , wherein a width of the guard ring is in a range between 3 μm and 10 μm.

9. The method of claim 8 , further comprising additional guard rings, and wherein a spacing between two of the guard rings is in a range between 0.5 μm and 2 μm.

10. The method of claim 1 , wherein the GaN power device comprises a GaN p-n diode.

Assignments (2)
CONFIRMATORY LICENSE Recorded Oct 23, 2020
From: ARIZONA BOARD OF REGENTS, ARIZONA STATE UNIVERSITY
To: U.S. DEPARTMENT OF ENERGY
Reel/Frame 054192/0159 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2020
From: ZHAO, YUJI; FU, HOUQIANG; FU, KAI
To: ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITY
Reel/Frame 054094/0839 →
Continuity (2)
Provisional Application 62924410 · Oct 22, 2019
Related Publication 20210202257A1 · Jul 1, 2021