Barrier layer for contact structures of semiconductor devices
The present disclosure describes a semiconductor device with a diffusion barrier layer on source/drain (S/D) contact structures and a method of fabricating the semiconductor device. The method of fabricating the semiconductor device includes forming a S/D region on a fin structure, forming a S/D contact structure including a metal on the S/D region, forming a barrier layer including silicon and the metal on the S/D contact structure, and forming a via contact structure on the barrier layer. The barrier layer blocks a diffusion of the metal in the S/D contact structure to the via contact structure.
1. A method of fabricating a semiconductor device, the method comprising:
forming a source/drain (S/D) region on a fin structure;
forming, on the S/D region, a first silicide layer;
forming, on the first silicide layer, a S/D contact that comprises a first metal and a glue layer, wherein the first metal is in physical contact with the first silicide layer and a sidewall surface of the glue layer;
converting a top portion of the first metal into a second silicide layer, wherein the second silicide layer is in contact with the sidewall surface of the glue layer;
removing a portion of the second silicide layer;
implanting the second silicide layer with silicon; and
forming, on the second silicide layer, a via contact structure that comprises a second metal different from the first metal, wherein the second silicide layer blocks a diffusion of the first metal in the S/D contact to the via contact structure, and wherein the second metal is in physical contact with the second silicide layer.
2. The method of claim 1 , wherein the converting the top portion of the first metal into the second silicide layer comprises:
implanting the top portion of the first metal with silicon; and
annealing the first metal to form the second silicide layer.
3. The method of claim 1 , wherein the converting the top portion of the first metal into the second silicide layer comprises:
treating the first metal with a silicon-containing gas; and
annealing the treated first metal to form the second silicide layer.
4. The method of claim 1 ,
wherein the forming the second silicide layer comprises:
depositing a semiconductor layer comprising silicon on the first metal;
depositing an additional glue layer on the semiconductor layer;
depositing a cap layer on the additional glue layer; and
annealing the semiconductor layer and the first metal to form the second silicide layer.
5. The method of claim 1 , wherein the removing the portion of the second silicide layer comprises:
etching the second silicide layer to form a concave top surface of the second silicide layer, wherein the via contact structure is formed on the concave top surface.
6. A semiconductor device, comprising:
a source/drain (S/D) region disposed on a fin structure;
a gate structure on the fin structure and adjacent to the S/D region;
a gate capping structure on the gate structure;
a S/D contact disposed on the S/D region and comprising a metal, a glue layer, and a first silicide layer, wherein the metal is in physical contact with the first silicide layer;
a second silicide layer disposed on the S/D contact and comprising the metal, wherein top surfaces of the gate capping structure, the glue layer, and the second silicide layer are coplanar; and
a via contact structure disposed on the second silicide layer, wherein the second silicide layer blocks a diffusion of the metal in the S/D contact to the via contact structure.
7. The semiconductor device of claim 6 , wherein the second silicide layer comprises a dopant.
8. The semiconductor device of claim 6 , wherein the via contact structure comprises a first portion in the second silicide layer and a second portion above the second silicide layer, and wherein a diameter of the first portion is greater than that of the second portion.
9. The semiconductor device of claim 6 , wherein the via contact structure comprises an additional metal different from the metal.
10. The semiconductor device of claim 6 , wherein the second silicide layer comprises cobalt monosilicide and cobalt disilicide, and wherein a concentration of the cobalt monosilicide is greater than that of the cobalt disilicide.
11. The semiconductor device of claim 8 , wherein a ratio of the diameter of the first portion to the diameter of the second portion ranges from about 1.05 to about 1.7.
12. A method, comprising:
forming a fin structure on a substrate;
forming a source/drain (S/D) region on the fin structure;
forming a first silicide layer on the S/D region;
forming, on the first silicide layer, a S/D contact comprising a metal and a glue layer;
treating the metal to form a second silicide layer;
forming a dielectric layer in contact with top surfaces of the glue layer and the second silicide layer;
removing a portion of the dielectric layer and a portion of the second silicide layer to expose the second silicide layer;
implanting the exposed second silicide layer with silicon; and
forming a via contact structure on the second silicide layer, wherein the second silicide layer blocks a diffusion of the metal in the S/D contact to the via contact structure.
13. The method of claim 12 , wherein the treating the metal comprises:
implanting a top portion of the metal with silicon; and
annealing the metal to form the second silicide layer.
14. The method of claim 12 , wherein the treating the metal comprises:
treating the metal with a silicon-containing gas; and
annealing the treated metal to form the second silicide layer.
15. The method of claim 12 ,
wherein the treating the metal to form the second silicide layer comprises:
depositing a semiconductor layer comprising silicon on the metal;
depositing an additional glue layer on the semiconductor layer;
depositing a cap layer on the additional glue layer; and
annealing the semiconductor layer and the metal to form the second silicide layer.
16. The method of claim 15 , further comprising diffusing a dopant in the semiconductor layer into the barrier layer.
17. The method of claim 15 , further comprising removing the cap layer, the glue layer, and the semiconductor layer.
18. The method of claim 12 , wherein the forming the via contact structure comprises:
etching the second silicide layer to form a concave top surface of the second silicide layer; and
forming the via contact structure on the concave top surface.
19. The method of claim 12 , further comprising annealing the second silicide layer implanted with silicon.
20. The method of claim 12 , wherein the removing the portion of the dielectric layer and the portion of the second silicide layer comprises:
etching the portion of dielectric layer over the second silicide layer to form a first opening; and
etching the portion of the second silicide layer to form a second opening having a concave top surface, wherein the second opening has a diameter greater than that of the first opening, and wherein the via contact structure is formed in the first and second openings.