IP Library › Granted Patent US 11,799,489
Granted Patent B2
US 11,799,489 · App. 17/084,610 · Granted Oct 24, 2023

Temperature compensated common counter ADC method for neural compute

Inventors: Vishal Sarin (Saratog, CA); Vikram Kowshik (Cupertino, CA); Sankha Subhra Saha (Santa Clara, CA); Siraj Fulum (Milipitas, CA)
H03M1/0602G06N3/063G11C11/54G06N3/04G06N3/08G11C11/56G11C16/04
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Quick Facts
Patent No.
US 11,799,489
App. No.
17/084,610
Granted
Oct 24, 2023
Kind
B2
Abstract

The method provides for a low power and a temperature independent analog to digital convertor for systems which use non-volatile cells for forming neurons to be used for neural network applications. The method uses a common counter which can be an up-counter or a down-counter depending on implementation, but in which the source and sink currents to a comparator are changed with temperature by the same percentage as the average bit line current for specific weight distributions programmed in the non-volatile cells forming the neurons. The method uses charge accumulation for detecting the average neuron current.

Claims (27)

1. A common counter analog-to-digital converter (ADC) method for neural compute comprising:

providing an array of non-volatile memory cells forming a number of neurons, wherein each word line of the array of cells gets a pulse of duration t, which is a function of an input vector xi, and wherein a current of the cell is a function of a weight parameter yi, such that the product xi*yi provides a charge to the bit line forming the neuron proportional to the input vector and the weight parameter;

with a common counter, which counts up and wherein the common counter output is provided as an input to at least one analog to digital convertor (ADC); and

with at least one ADC, measuring an average current value of bit line forming a neuron by way of charge accumulation.

2. The common counter ADC method of claim 1 , wherein the ADC output is effectively independent of temperature.

3. The common counter ADC method of claim 2 , wherein the average bit line current is used for a neural network computation operation.

4. The common counter ADC method of claim 3 further comprising:

providing a plurality of comparators with two temperature compensated source currents; and wherein a first source is used to charge a sense node for a fixed time when the bit line current is on, and a second current source is used to subsequently charge the sense node when the bit line current is off and till a specific trip point is reached, and wherein a count from the common counter which counts up, is latched as the ADC output when the trip point is reached.

5. The common counter ADC method of claim 4 , wherein a temperature compensation is based on a neural array bit line current temperature characterization, by measuring the percentage change in the bit line current at different temperatures.

6. The common counter ADC method of claim 5 further comprising:

implementing the temperature characterization of the bit line current for different types of probable weight (yi) distributions; and

using a most probable weight distribution data for temperature compensation of the bit line forming the neuron.

7. The common counter ADC method of claim 6 , wherein the two source currents are changed with temperature by the same percentage as the average bit line current forming the neuron, as determined by the bit line current temperature characterization.

8. The common counter ADC method of claim 4 , wherein the sense node trip point is changed with temperature, so that the ADC output is effectively independent of temperature.

9. A common counter analog-to-digital converter (ADC) system for neural compute comprising:

an array of non-volatile memory cells forming a number of neurons, wherein each word line of the array of cells gets a pulse of duration t, which is a function of an input vector xi, and wherein a current of the cell is a function of a weight parameter yi, such that the product xi*yi provides a charge to the bit line forming the neuron proportional to an input vector and the weight parameter;

with a common counter which counts down and wherein the common counter output is provided as an input to at least one analog to digital convertor (ADC); and

with at least one ADC, measuring an average current value of bit line forming a neuron by way of charge accumulation.

10. The common counter ADC method of claim 9 , wherein the ADC output is effectively independent of temperature.

11. The common counter ADC method of claim 10 , wherein the average bit line current is used for a neural network computation operation.

12. The common counter ADC method of claim 11 further comprising:

providing a plurality of comparators with one temperature compensated source current and one temperature compensated sink current, and wherein the source is used to charge a sense node for a fixed time when the bit line current is on, and wherein the current sink is used to subsequently discharge the sense node when the bit line current is off and till a specific trip point is reached, and wherein a count from the common counter which counts down, is latched as the ADC output when the trip point is reached.

13. The common counter ADC method of claim 12 , wherein a temperature compensation is based on a neural array bit line current temperature characterization, by measuring the percentage change in the bit line current at different temperatures.

14. The common counter ADC method of claim 13 further comprising:

doing the temperature characterization of the bit line current for different types of probable weight (yi) distributions, and using a most probable weight distribution data for temperature compensation of the bit line forming the neuron.

15. The common counter ADC method of claim 14 , wherein the current source and the current sink to the sense node are changed with temperature by the same percentage as the average bit line current forming the neuron, as determined by the bit line current temperature characterization.

16. The common counter ADC method of claim 9 , wherein the sense node trip point is changed with temperature, so that the ADC output is effectively independent of temperature.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2026
From: ANALOG INFERENCE INC.
To: SAGENCE AI CORPORATION
Reel/Frame 073397/0464 →
SECURITY INTEREST Recorded Dec 8, 2025
From: SAGENCE AI CORPORATION
To: CUSTOMERS BANK
Reel/Frame 073136/0296 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 28, 2023
From: SARIN, VISHAL; KOWSHIK, VIKRAM; SAHA, SANKHA; MOSSA, SIRAJ
To: ANALOG INFERENCE INC.
Reel/Frame 063478/0680 →
Continuity (2)
Provisional Application 62927133 · Oct 29, 2019
Related Publication 20210143828A1 · May 13, 2021