IP Library Granted Patent US 11,562,533
Granted Patent B2
US 11,562,533 · App. 17/086,680 · Granted Jan 24, 2023

Assembling primitive data into multi-view primitive blocks in a graphics processing system

Inventor: John W. Howson (St Albans, GB)
Assignee: Imagination Technologies Limited
G06T17/10G06T1/0007G06T11/40G06T15/005
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Quick Facts
Patent No.
US 11,562,533
App. No.
17/086,680
Granted
Jan 24, 2023
Kind
B2
Abstract

Methods and apparatus for generating a data structure for storing primitive data for a number of primitives and vertex data for a plurality of vertices, wherein each primitive is defined with reference to one or more of the plurality of vertices. The vertex data comprises data for more than one view, such as a left view and a right view, with vertex parameter values for a first group of vertex parameters being stored separately for each view and vertex parameter values for a second, non-overlapping group of vertex parameters being stored only once and used when rendering either or both views.

Claims (54)

1. A data block assembly module for processing primitives in a graphics processing system, the data block assembly module comprising:

an input configured to receive primitive data for a plurality of views and wherein the plurality of views comprises at least a first view and a second view;

a processor arranged to generate a data block, the data block comprising:

vertex data for a plurality of vertices; and

the primitive data for a plurality of primitives, wherein the primitive data for a primitive comprises a reference to one or more of the plurality of vertices;

wherein the vertex data comprises, for each vertex in the plurality of vertices:

for each of a first plurality of vertex parameters, a vertex parameter value for the first view and a vertex parameter value for the second view, and

for each of a second plurality of vertex parameters, a single vertex parameter value for both the first and second views.

2. The data block assembly module according to claim 1 , wherein the processor arranged to generate the data block comprises logic configured to store, in the data block, the primitive data for the plurality of primitives, and for each vertex in the plurality of vertices, to store, in the data block, for each of the first plurality of vertex parameters, the vertex parameter value for the first view and the vertex parameter value for the second view; and for each of the second plurality of vertex parameters, the single vertex parameter value for both the first and second views.

3. The data block assembly module according to claim 1 , wherein the processor arranged to generate the data block comprises logic configured to determine which vertex parameters are in the first plurality of vertex parameters and which vertex parameters are in the second plurality of vertex parameters by:

comparing, for each vertex and each vertex parameter, a vertex parameter value for the first view and a vertex parameter value for the second view;

in response to determining that, for a vertex parameter, the vertex parameter value for the first view for at least one vertex does not match the vertex parameter for the second view for the same vertex, assigning the vertex parameter to the first plurality of vertex parameters; and

in response to determining that, for a vertex parameter and for each vertex, the vertex parameter value for the first view and the vertex parameter for the second view match, assigning the vertex parameter to the second plurality of vertex parameters.

4. The data block assembly module according to claim 1 , wherein the processor arranged to generate the data block comprises logic configured to determine which vertex parameters are in the first plurality of vertex parameters and which vertex parameters are in the second plurality of vertex parameters by:

inspecting, for each vertex parameter, code configured to generate a vertex parameter value for the first view and a vertex parameter value for the second view;

in response to determining that, for a vertex parameter, the code is capable of generating a vertex parameter value for the first view for at least one vertex that does not match the vertex parameter for the second view for the same vertex, assigning the vertex parameter to the first plurality of vertex parameters; and

in response to determining that, for a vertex parameter, the code is not capable of generating a vertex parameter value for the first view for any vertex that does not match the vertex parameter for the second view for the same vertex, assigning the vertex parameter to the second plurality of vertex parameters.

5. The data block assembly module according to claim 1 , wherein the processor arranged to generate the data block further comprises logic arranged to store control data identifying which vertex parameters are in the first plurality of vertex parameters and/or which vertex parameters are in the second plurality of vertex parameters.

6. The data block assembly module according to claim 1 , wherein the data block comprises data for stereoscopic rendering, the input is configured to receive primitive data for the first view and the second view, and the first view is a left view and the second view is a right view.

7. The data block assembly module according to claim 1 , wherein the data block comprises:

a first portion comprising only vertex parameter values for the first plurality of vertex parameters for the first view;

a second portion comprising only vertex parameter values for the first plurality of vertex parameters for the second view; and

a third portion comprising only vertex parameter values for the second plurality of vertex parameters.

8. The data block assembly module according to claim 1 , wherein:

the first plurality of vertex parameters comprises parameters defining a position of the vertex and/or parameters defining reflections; and/or

the second plurality of vertex parameters comprises attribute data.

9. The data block assembly module according to claim 1 , wherein the first portion and the second portion are interleaved.

10. The data block assembly module according to claim 1 , wherein the processor is implemented in hardware.

11. The data block assembly module according to claim 1 , wherein the first plurality of vertex parameters comprises parameters defining vertex positions.

12. The data block assembly module according to claim 11 , wherein the first plurality of vertex parameters further comprises parameters defining reflections.

13. The data block assembly module according to claim 1 , wherein the second plurality of vertex parameters comprises attribute data.

14. A method of assembling primitive data into data blocks in a graphics processing system, the method comprising:

receiving the primitive data for at least a first view and a second view for one or more primitives of a scene for rendering at least the first view and the second view, wherein the primitive data comprises a plurality of parameters; and

generating, in a data block assembly module, a data block, the data block comprising:

vertex data for a plurality of vertices; and

the primitive data for a plurality of primitives, wherein the primitive data for a primitive comprises a reference to one or more of the plurality of vertices;

wherein the vertex data comprises, for each vertex in the plurality of vertices:

for each of a first plurality of vertex parameters, a vertex parameter value for the first view and a vertex parameter value for the second view; and

for each of a second plurality of vertex parameters, a single vertex parameter value for both the first and second views.

15. The method according to claim 14 , wherein generating the data block comprises:

storing, in the data block, the primitive data for the plurality of primitives; and

storing in the data block, for each vertex in the plurality of vertices:

for each of the first plurality of vertex parameters, the vertex parameter value for the first view and the vertex parameter value for the second view; and

for each of the second plurality of vertex parameters, the single vertex parameter value for both the first and second views.

16. The method according to claim 14 , further comprising:

comparing, for each vertex and each vertex parameter, a vertex parameter value for the first view and a vertex parameter value for the second view;

in response to determining that, for a vertex parameter, the vertex parameter value for the first view for at least one vertex does not match the vertex parameter for the second view for the same vertex, assigning the vertex parameter to the first plurality of vertex parameters; and

in response to determining that, for a vertex parameter and for each vertex, the vertex parameter value for the first view and the vertex parameter for the second view match, assigning the vertex parameter to the second plurality of vertex parameters.

17. The method according to claim 14 , further comprising:

inspecting, for each vertex parameter, code configured to generate a vertex parameter value for the first view and a vertex parameter value for the second view;

in response to determining that, for a vertex parameter, the code is capable of generating a vertex parameter value for the first view for at least one vertex that does not match the vertex parameter for the second view for the same vertex, assigning the vertex parameter to the first plurality of vertex parameters; and

in response to determining that, for a vertex parameter, the code is not capable of generating a vertex parameter value for the first view for any vertex that does not match the vertex parameter for the second view for the same vertex, assigning the vertex parameter to the second plurality of vertex parameters.

18. The method according to claim 14 , further comprising:

storing control data in the data block identifying which vertex parameters are in the first plurality of vertex parameters and/or which vertex parameters are in the second plurality of vertex parameters.

Assignments (1)
SECURITY INTEREST Recorded Jul 31, 2024
From: IMAGINATION TECHNOLOGIES LIMITED
To: FORTRESS INVESTMENT GROUP (UK) LTD
Reel/Frame 068221/0001 →