Semiconductor chip including penetrating electrodes, and semiconductor package including the semiconductor chip

1. A semiconductor chip, comprising:

a body portion including a front surface and a back surface;

penetrating electrodes penetrating the body portion; and

back connection electrodes disposed over the back surface of the body portion and connected to the penetrating electrodes,

wherein:

the penetrating electrodes include a power penetrating electrode for transmitting a power voltage and a ground penetrating electrode for transmitting a ground voltage,

the back connection electrodes include a power back connection electrode connected to the power penetrating electrode and a ground back connection electrode connected to the ground penetrating electrode, and

one power back connection electrode is connected with two or more power penetrating electrodes at the same time, and one ground back connection electrode is connected with two or more ground penetrating electrodes at the same time,

wherein:

the power penetrating electrode includes a plurality of power penetrating electrodes which are arranged in a line along a first direction to form a column of power penetrating electrodes,

the power back connection electrode includes a line portion extending in the first direction to overlap with the column of power penetrating electrodes,

the ground penetrating electrode includes a plurality of ground penetrating electrodes which are arranged in a line along the first direction to form a column of ground penetrating electrodes, and

the ground back connection electrode includes a line portion extending in the first direction to overlap with the column of ground penetrating electrodes,

wherein the power back connection electrode and the ground back connection electrode face each other in a second direction crossing the first direction,

wherein the power penetrating electrode further includes a side power penetrating electrode disposed at one or more sides of the column of power penetrating electrodes in the second direction,

the power back connection electrode further includes a protrusion portion protruding from its line portion in the second direction to overlap with the side power penetrating electrode,

the ground penetrating electrode further includes a side ground penetrating electrode disposed at one or more sides of the column of ground penetrating electrodes in the second direction, and

the ground back connection electrode further includes a protrusion portion protruding from its line portion in the second direction to overlap with the side ground penetrating electrode.

2. The semiconductor chip according to claim 1 , wherein the protrusion portion of the power back connection electrode and the protrusion portion of the ground back connection electrode face each other in the first direction.

3. The semiconductor chip according to claim 2 , wherein the protrusion portion of the power back connection electrode includes a plurality of protrusion portions of the power back connection electrode, and the protrusion portion of the ground back connection electrode includes a plurality of protrusion portions of the ground back connection electrode, and

the plurality of protrusion portions of the power back connection electrode and the plurality of protrusion portions of the ground back connection electrode are alternately arranged along the first direction.

4. The semiconductor chip according to claim 1 , wherein the back connection electrode includes a plurality of back connection electrodes, and

wherein the semiconductor chip further comprises:

an insulating layer formed over the back surface of the body portion and filling a space between the plurality of back connection electrodes.

5. The semiconductor chip according to claim 1 , further comprising:

front connection electrodes disposed over the front surface of the body portion and connected to the penetrating electrodes.

6. A semiconductor chip, comprising:

a body portion including a front surface and a back surface;

penetrating electrodes penetrating the body portion;

back connection electrodes disposed over the back surface of the body portion and connected to the penetrating electrodes; and

a dummy back connection electrode formed over the back surface of the body portion,

wherein:

the penetrating electrodes include a power penetrating electrode for transmitting a power voltage and a ground penetrating electrode for transmitting a ground voltage,

the back connection electrodes include a power back connection electrode connected to the power penetrating electrode and a ground back connection electrode connected to the ground penetrating electrode,

one power back connection electrode is connected with two or more power penetrating electrodes at the same time, and one ground back connection electrode is connected with two or more ground penetrating electrodes at the same time,

the dummy back connection electrode is disposed not to be connected to the penetrating electrodes, and

the dummy back connection electrode is formed along all sides of the body portion in a rectangle shape to surround a region where the penetrating electrodes are arranged.

7. The semiconductor chip according to claim 6 , wherein the dummy back connection electrode has substantially the same layered-structure as the back connection electrode.

8. A semiconductor package, comprising:

a first semiconductor chip; and

a second semiconductor chip stacked in a vertical direction with the first semiconductor chip,

wherein each of the first and second semiconductor chips comprises:

a body portion including a front surface and a back surface;

penetrating electrodes penetrating the body portion; and

back connection electrodes disposed over the back surface of the body portion and connected to the penetrating electrodes,

wherein the penetrating electrodes include a power penetrating electrode for transmitting a power voltage and a ground penetrating electrode for transmitting a ground voltage,

the back connection electrodes include a power back connection electrode connected to the power penetrating electrode and a ground back connection electrode connected to the ground penetrating electrode, and

one power back connection electrode is connected with two or more power penetrating electrodes at the same time, and one ground back connection electrode is connected with two or more ground penetrating electrodes at the same time.

9. The semiconductor package according to claim 8 , wherein each of the first and second semiconductor chips further comprises:

front connection electrodes disposed over the front surface of the body portion and connected to the penetrating electrodes, and

wherein the back connection electrodes of the first semiconductor chip and the front connection electrodes of the second semiconductor chip are connected to each other.

10. The semiconductor package according to claim 9 , further comprising:

a filling material filling a space between the first semiconductor chip and the second semiconductor chip.

11. The semiconductor package according to claim 10 , wherein the first semiconductor chip further comprises an insulating layer formed over the back surface of the body portion of the first semiconductor chip and filling a space between the back connection electrodes of the first semiconductor chip, and

the filling material fills a remaining space between the first semiconductor chip and the second semiconductor chip, excluding the insulating layer.

12. The semiconductor chip according to claim 8 , wherein

the penetrating electrodes include a signal penetrating electrode for transmitting a signal, and

the back connection electrodes include a signal back connection electrode connected to the signal penetrating electrode.

13. The semiconductor chip according to claim 12 , wherein one signal back connection electrode is connected with one signal penetrating electrode.

14. The semiconductor chip according to claim 12 , wherein

the body portion includes a central region and edge regions disposed at both sides of the central region,

the signal penetrating electrode and the signal back connection electrode are disposed in the central region,

the power penetrating electrode and the power back connection electrode are disposed in the edge regions, and

the ground penetrating electrode and the ground back connection electrode are disposed in the edge regions so as not to overlap with the power penetrating electrode and the power back connection electrode.

15. The semiconductor chip according to claim 8 , wherein

the power penetrating electrode includes a plurality of power penetrating electrodes which are arranged in a line along a first direction to form a column of power penetrating electrodes,

the power back connection electrode includes a line portion extending in the first direction to overlap with the column of power penetrating electrodes,

the ground penetrating electrode includes a plurality of ground penetrating electrodes which are arranged in a line along the first direction to form a column of ground penetrating electrodes, and

the ground back connection electrode includes a line portion extending in the first direction to overlap with the column of ground penetrating electrodes.

16. The semiconductor chip according to claim 15 , wherein the power back connection electrode and the ground back connection electrode face each other in a second direction crossing the first direction.

17. The semiconductor chip according to claim 16 , wherein

the power back connection electrode includes a plurality of power back connection electrodes, and

the ground back connection electrode includes a plurality of ground back connection electrodes, and

the plurality of power back connection electrodes and the plurality of ground back connection electrodes are alternately arranged along the second direction.