Single crystal semiconductor structure and method of fabricating the same
A single crystal semiconductor structure includes: an amorphous substrate; a single crystal semiconductor layer provided on the amorphous substrate; and a thin orienting film provided between the amorphous substrate and the single crystal semiconductor layer, wherein the thin orienting film is a single crystal thin film, and the thin orienting film has a non-zero thickness that is equal to or less than 10 times a critical thickness h c .
1. A single crystal semiconductor structure comprising:
an amorphous substrate;
a single crystal semiconductor layer provided on the amorphous substrate; and
an orienting film provided between the amorphous substrate and the single crystal semiconductor layer,
wherein the orienting film comprises a single crystal film,
wherein the orienting film has a non-zero thickness that is equal to or less than 10 times a critical thickness h c , and
wherein the critical thickness h c is determined by the following equation:
h
c
=
[
b
4
π
(
1
+
μ
)
ϵ
0
)
]
[
ln
(
h
c
b
)
+
1
]
,
where b is a Burgers vector of dislocation of the orienting film, μ is Poisson's ratio of the orienting film, and ε 0 is a degree of lattice misfit between the orienting film and the single crystal semiconductor layer, and
wherein the orienting film has a (001) crystal orientation direction or a (111) crystal orientation direction and the single crystal semiconductor layer comprises a GaN layer having a (001) crystal orientation direction.
2. The single crystal semiconductor structure of claim 1 , wherein the single crystal semiconductor layer comprises:
a lower single crystal layer; and
an upper single crystal layer, and
wherein the lower single crystal layer comprises a nucleation layer for the upper single crystal layer.
3. The single crystal semiconductor structure of claim 2 , wherein a crystallinity of the upper single crystal layer is higher than a crystallinity of the lower single crystal layer.
4. The single crystal semiconductor structure of claim 2 , further comprising:
a mask pattern provided between the lower single crystal layer and the upper single crystal layer,
wherein the mask pattern comprises holes through which the lower single crystal layer is exposed to the upper single crystal layer, and
wherein the upper single crystal layer is provided on the mask pattern and fills the holes.
5. The single crystal semiconductor structure of claim 2 , wherein the orienting film has a lattice structure that matches a lattice structure of the lower single crystal layer.
6. The single crystal semiconductor structure of claim 1 , wherein the orienting film comprises a CeO 2 film having a (111) crystal orientation direction or a Sc 2 O 3 film having a (111) crystal orientation direction.
7. The single crystal semiconductor structure of claim 1 , further comprising: an upper heat transfer layer provided between the orienting film and the amorphous substrate.
8. The single crystal semiconductor structure of claim 7 , wherein the upper heat transfer layer comprises a metal.
9. The single crystal semiconductor structure of claim 7 , further comprising: a planarization layer provided between the upper heat transfer layer and the orienting film,
wherein the planarization layer has a top surface facing the orienting film and a bottom surface facing the upper heat transfer layer, and
wherein a surface roughness of the top surface of the planarization layer is less than a surface roughness of the bottom surface of the planarization layer.
10. The single crystal semiconductor structure of claim 9 , wherein the planarization layer comprises a silicon oxide or a silicon nitride.
11. The single crystal semiconductor structure of claim 7 , further comprising: a lower heat transfer layer provided on a side of the amorphous substrate opposite the orienting film.
12. The single crystal semiconductor structure of claim 11 , wherein the lower heat transfer layer comprises a metal.
13. A single crystal semiconductor structure comprising:
an amorphous substrate;
a single crystal semiconductor layer provided on the amorphous substrate; and
an orienting film provided between the amorphous substrate and the single crystal semiconductor layer,
wherein the orienting film comprises a single crystal film,
wherein the orienting film has a non-zero thickness that is equal to or less than 10 times a critical thickness h c , and
wherein the critical thickness h c is determined by the following equation:
h
c
=
[
b
4
π
(
1
+
μ
)
ϵ
0
)
]
[
ln
(
h
c
b
)
+
1
]
,
where b is a Burgers vector of dislocation of the orienting film, μ is Poisson's ratio of the orienting film, and ε 0 is a degree of lattice misfit between the orienting film and the single crystal semiconductor layer, and
wherein the orienting film comprises a MgO film having a (100) crystal orientation direction, and the single crystal semiconductor layer comprises a GaAs layer having a (100) crystal orientation direction.