IP Library Granted Patent US 11,569,364
Granted Patent B2
US 11,569,364 · App. 17/103,623 · Granted Jan 31, 2023

Silicide backside contact

Inventors: Chen-Hung Tsai (Hsinchu, TW); Chen-Ming Lee (Hsinchu, TW); Fu-Kai Yang (Hsinchu, TW); Mei-Yun Wang (Hsin-Chu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H01L29/4933H01L21/823418H01L21/823431H01L21/823475H01L27/0886H01L29/401H01L29/41791H01L29/66545H01L29/66795H01L29/785
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,569,364
App. No.
17/103,623
Granted
Jan 31, 2023
Kind
B2
Abstract

A semiconductor structure and a method of forming the same are provided. In an embodiment, a semiconductor structure includes a first plurality of channel members over a backside dielectric layer, a second plurality of channel members over the backside dielectric layer, a silicide feature disposed in the backside dielectric layer, and a source/drain feature disposed over the silicide feature and extending between the first plurality of channel members and the second plurality of channel members. The silicide feature extends through an entire depth of the backside dielectric layer.

Claims (63)

1. A semiconductor device, comprising:

a first plurality of channel members over a first portion of a backside dielectric layer;

a second plurality of channel members over a second portion of the backside dielectric layer;

a silicide feature disposed between the first portion and the second portion of the backside dielectric layer along a direction; and

a source/drain feature disposed over the silicide feature and extending between the first plurality of channel members and the second plurality of channel members along the direction,

wherein the silicide feature extends through an entire depth of the backside dielectric layer,

wherein the silicide feature directly between the first portion and the second portion of the backside dielectric layer has a first width along the direction,

wherein the source/drain feature comprises a second width along the direction,

wherein the first width is greater than the second width.

2. The semiconductor device of claim 1 , further comprising:

a backside metal line underlying the backside dielectric layer,

wherein the silicide feature extends between the backside metal line and the source/drain feature.

3. The semiconductor device of claim 1 , wherein the silicide feature comprises nickel silicide, platinum silicide, or titanium silicide.

4. The semiconductor device of claim 1 , further comprising:

a dielectric liner disposed between the silicide feature and the backside dielectric layer.

5. The semiconductor device of claim 4 ,

wherein the dielectric liner comprises silicon nitride or silicon carbonitride,

wherein the backside dielectric layer comprises silicon oxide.

6. The semiconductor device of claim 1 , further comprising:

an isolation feature adjacent the backside dielectric layer,

wherein the isolation feature is in direct contact with the silicide feature.

7. The semiconductor device of claim 1 ,

wherein the first width is between about 16 nm and about 22 nm,

wherein the second width is between about 12 nm and about 16 nm.

8. The semiconductor device of claim 1 , further comprising:

a plurality of inner spacer features interleaving the first plurality of channel members,

wherein the silicide feature is in contact with a bottommost inner spacer feature of the plurality of inner spacer features.

9. A semiconductor structure, comprising:

a backside metal line;

a backside dielectric layer disposed over the backside metal line;

a silicide feature extending through the backside dielectric layer to be in contact with the backside metal line;

a protective liner extending continuously from between the silicide feature and a sidewall of the backside dielectric layer to a top surface of the backside dielectric layer;

a source/drain feature disposed on the silicide feature;

a contact etch stop layer (CESL) disposed on the source/drain feature; and

a dielectric layer disposed over the CESL.

10. The semiconductor structure of claim 9 , wherein the silicide feature comprises nickel silicide, platinum silicide, or titanium silicide.

11. The semiconductor structure of claim 9 ,

wherein the CESL comprises silicon nitride or silicon carbonitride,

wherein the dielectric layer comprises silicon oxide.

12. The semiconductor structure of claim 9 , wherein the source/drain feature comprises:

an outer epitaxial layer; and

an inner epitaxial layer over the outer epitaxial layer.

13. The semiconductor structure of claim 9 , wherein the source/drain feature extends between a first plurality of channel members and a second plurality of channel members along a direction.

14. The semiconductor structure of claim 13 ,

wherein the silicide feature in the backside dielectric layer and below the backside metal line comprises a first width along the direction,

wherein the source/drain feature comprises a second width along the direction, and

wherein the first width is greater than the second width.

15. The semiconductor structure of claim 9 , wherein the silicide feature comprises silicon and germanium.

16. A semiconductor structure, comprising:

a backside metal line extending lengthwise along a direction;

a backside dielectric layer disposed on the backside metal line;

a silicide feature extending through the backside dielectric layer and in direct contact with the backside metal line;

a first gate structure and a second gate structure disposed over the backside dielectric layer; and

a source/drain feature disposed on the silicide feature and between the first gate structure and the second gate structure along the direction,

wherein a first width of the silicide feature between the first gate structure and the second gate structure along the direction is greater than a second width of the source/drain feature along the direction.

17. The semiconductor structure of claim 16 ,

wherein the first width is between about 16 nm and about 22 nm,

wherein the second width is between about 12 nm and about 16 nm.

18. The semiconductor structure of claim 16 , wherein the silicide feature comprises nickel silicide, platinum silicide, titanium silicide, or germanium.

19. The semiconductor structure of claim 16 , wherein the backside dielectric layer comprises silicon oxide.

20. The semiconductor structure of claim 16 ,

wherein the silicide feature is spaced apart from the backside dielectric layer by a liner,

wherein the liner comprises silicon nitride or silicon carbonitride.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 11, 2021
From: TSAI, CHEN-HUNG; LEE, CHEN-MING; YANG, FU-KAI; WANG, MEI-YUN
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 055566/0271 →
Continuity (1)
Related Publication 20220165860A1 · May 26, 2022
Cited By (2)
US 12,588,265 US 12,588,266