Load pull pattern generation

1. A method for generating a load pull reflection factor pattern comprising:

a slide-screw impedance tuner having

a test port and an idle port,

a slabline between the ports, and

a tuning probe insertable into the slabline,

a test fixture having an input port and an output port, and

a reflection factor pattern generation algorithm;

wherein

either port of the test fixture is connected with the test port of the tuner;

and wherein

the reflection factor pattern generation algorithm comprises:

i) calibrate the test fixture and the tuner at a frequency F and a horizontal Xi and vertical Yi range of positions of the tuning probe and save,

ii) enter a target phase Φ.out and a pattern phase spread ΔΦ of the reflection factor,

iii) calculate a horizontal position XP of the tuning probe for creating the phase Φ.out of the reflection factor at a DUT reference plane,

iv) calculate a frequency step δF and a number of steps K required for creating the phase spread ΔΦ of the reflection factor pattern around Φ.out,

v) retrieve vertical positions Y 1 , Y 2 . . . Yi . . . YM for M≥3 reflection factor levels from the tuner calibration in step i),

vi) position the tuning probe at the positions XP and Yi determined in steps iii) and v).

2. The method for generating a load pull reflection factor pattern of claim 1 ,

wherein

the test fixture comprises:

input and output sections of transmission line inserted between the corresponding test fixture ports and a DUT having an input and an output port, said sections of transmission line connecting the input port of the test fixture with the input port of the DUT and the output port of the DUT with the output port of the test fixture.

3. The method for generating a load pull reflection factor pattern of claim 1 ,

wherein

the phase of the reflection factor created by the tuner at DUT reference plane equals the negative of a phase−|Φ.out| of an output reflection factor of the DUT;

wherein

the tuner probe position is calculated using LP=|Φ.out|*λ/(4*π)+N*λ/2, wherein LP includes the electric lengths of the test fixture output section (LTF.OUT) and the slabline section between the test port and the tuning probe (XP) of the tuner and N is an integer generating a length XP=LP-LTF.OUT within the horizontal position range of the tuning probe;

and wherein

the frequency offset δF and number of adjacent sidebands K is calculated to create the pattern spread ±ΔΦ/2 of the reflection factor Γ=|Γ|*exp(jΦ)) as follows: δF=ΔΦ/(4π*LP*K).

4. The method for generating a load pull reflection factor pattern of claim 1 ,

wherein

the test fixture comprises: at least two wafer probes, wherein an input wafer probe corresponds to the input section of the test fixture and an output wafer probe corresponds to the output section of the test fixture.

5. The method for generating a load pull reflection factor pattern as in claim 1 or 3 comprising:

setting a signal source to a frequency F and adjacent sidebands to F±j*δF for (2<j≤K), at M tuner settings, TS. 1 , TS. 2 . . . TS.i . . . TS.M;

wherein

all tuner settings TS.i comprise the same horizontal tuning probe position XP;

TS. 1 comprises vertical position of the tuning probe creating reflection factor |Γ(TS. 1 )|≤0.2;

TS.i for i>1 comprises vertical position of the tuning probe creating reflection factor |Γ(TS.i)|≈i/(M+1).

6. The method for generating a load pull reflection factor pattern of claim 1 ,

wherein

the impedance tuner is an input tuner and is inserted between a signal source and the input section of the test fixture,

and wherein

the output port of the tuner is the test port and is connected to the input port of the test fixture.

7. The method for generating a load pull reflection factor pattern of claim 1 ,

wherein

the impedance tuner is an output tuner and is inserted between the output section of the test fixture and a load,

and wherein

the input port of the tuner is the test port and is connected to the output port of the test fixture.