IP Library › Granted Patent US 11,233,604
Granted Patent B2
US 11,233,604 · App. 17/109,476 · Granted Jan 25, 2022

Method and apparatus for channel encoding/decoding in a communication or broadcasting system

Inventors: Kyung-Joong Kim (Seoul, KR); Seho Myung (Seoul, KR); Min Jang (Seongnam-si, KR); Hong-Sil Jeong (Suwon-si, KR); Jae-Yoel Kim (Seongnam-si, KR); Seok-Ki Ahn (Suwon-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H04L1/0041H03M13/00H03M13/05H03M13/1102H03M13/116H03M13/1165H03M13/1177H03M13/25H03M13/256H03M13/616H03M13/6393H03M13/6513H04L1/00
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Quick Facts
Patent No.
US 11,233,604
App. No.
17/109,476
Granted
Jan 25, 2022
Kind
B2
Abstract

A channel encoding method in a communication or broadcasting system is provided. The channel encoding method includes reading a first sequence corresponding to a parity check matrix, converting the first sequence to a second sequence by applying a certain rule to a block size corresponding to a parity check matrix and the first sequence, and encoding information bits based on the second sequence. The block size has at least two different integer values.

Claims (84)

1. A method for encoding in a communication or broadcasting system supporting a low density parity check (LDPC) code, the method comprising:

identifying a base matrix consisting of 0 and 1;

identifying a predetermined number based on the base matrix;

identifying a block size Z based on the predetermined number;

identifying, from among a plurality of sets of block sizes, a set of block sizes associated with the block size Z;

identifying an exponent matrix including at least one integer value based on the identified set of block sizes;

obtaining a parity check matrix based on the base matrix, the block size Z, and the exponent matrix; and

encoding information bits based on the parity check matrix,

wherein the parity check matrix includes a submatrix consisting of Z×Z zero matrices and Z×Z circular permutation matrices.

2. The method of claim 1 ,

wherein a multiplication of the predetermined number and the block size Z is larger than or equal to a size of the information bits.

3. The method of claim 1 , wherein the identifying of the block size comprises:

identifying a size of the information bits to encode; and

identifying the block size based on the size of the information bits.

4. The method of claim 1 , wherein the set of block sizes is associated with block sizes determined among {(A+i), 2(A+i), 2 2 (A+i), . . . , 2 S (A+i)}, where i=0, 1, 2, . . . , A−1, and A and S are positive integers.

5. The method of claim 4 , wherein A is 8 and S is 4.

6. The method of claim 1 ,

wherein the LDPC code is determined based on one of parity check matrices of at least two different sizes.

7. The method of claim 1 , wherein the parity check matrix is obtained based on a circular permutation matrix by applying a circularly shifting operation including one of a modulo operation or a flooring operation.

8. The method of claim 1 , wherein the LDPC code is determined based on one of two or more base matrices.

9. The method of claim 1 , wherein at least one of the Z×Z circular permutation matrices is a circularly shifted matrix of a Z×Z identity matrix.

10. An encoder in a communication or broadcasting system supporting a low density parity check (LDPC) code, the encoder comprising:

a transceiver;

a memory; and

at least one processor configured to:

identify a base matrix consisting of 0 and 1,

identify a predetermined number based on the base matrix,

identify a block size Z based on the predetermined number,

identify, from among a plurality of sets of block sizes, a set of block sizes associated with the block size Z,

identify an exponent matrix including at least one integer value based on the identified set of block sizes,

obtain a parity check matrix based on the base matrix, the block size Z and the exponent matrix, and

encode information bits based on the parity check matrix,

wherein the parity check matrix includes a submatrix consisting of Z×Z zero matrices and Z×Z circular permutation matrices.

11. The encoder of claim 10 ,

wherein a multiplication of the predetermined number and the block size Z is larger than or equal to a size of the information bits.

12. The encoder of claim 10 , wherein the at least one processor is further configured to:

identify a size of the information bits to encode, and

identify the block size based on the size of the information bits.

13. The encoder of claim 10 , wherein the set of block sizes is associated with block sizes determined among {(A+i), 2(A+i), 2 2 (A+i), . . . 2 S (A+i)}, where i=0, 1, 2, . . . , A−1, and A and S are positive integers.

14. The encoder of claim 13 , wherein A is 8 and S is 4.

15. The encoder of claim 10 , wherein the LDPC code is determined based on one of parity check matrices of at least two different sizes.

16. The encoder of claim 10 , wherein the parity check matrix is obtained based on a circular permutation matrix by applying a circularly shifting operation including one of a modulo operation or a flooring operation.

17. The encoder of claim 10 , wherein the LDPC code is determined based on one of two or more base matrices.

18. The encoder of claim 10 , wherein at least one of the Z×Z circular permutation matrices is a circularly shifted matrix of a Z×Z identity matrix.

19. A method for decoding in a communication or broadcasting system supporting a low density parity check (LDPC) code, the method comprising:

receiving a signal from a transmitter; and

obtaining a bit sequence by decoding the signal,

wherein the decoding of the signal is performed based on a parity check matrix,

wherein the parity check matrix is based on a base matrix, a block size Z, and an exponent matrix including at least one integer value,

wherein the exponent matrix is based on a set of block sizes from among a plurality of sets of block sizes,

wherein the set of block sizes is based on the block size Z,

wherein the block size Z is based on a predetermined number,

wherein the predetermined number is based on the base matrix, and

wherein the parity check matrix includes a submatrix consisting of Z×Z zero matrices and Z×Z circular permutation matrices.

20. The method of claim 19 ,

wherein a multiplication of the predetermined number and the block size Z is larger than or equal to a size of information bits.

21. The method of claim 19 , wherein the block size is based on a size of information bits.

22. The method of claim 19 , wherein the set of block sizes is associated with block sizes determined among {(A+i), 2(A+i), 2 2 (A+i), . . . , 2 S (A+i)}, where i=0, 1, 2, . . . , A−1, and A and S are positive integers.

23. The method of claim 22 , wherein A is 8 and S is 4.

24. The method of claim 19 , wherein the LDPC code is based on one of parity check matrices of at least two different sizes.

25. The method of claim 19 , wherein the parity check matrix is based on a circular permutation matrix by applying a circularly shifting operation including one of a modulo operation or a flooring operation.

26. The method of claim 19 , wherein the LDPC code is determined based on one of two or more base matrices.

27. The method of claim 19 , wherein at least one of the Z×Z circular permutation matrices is a circularly shifted matrix of a Z×Z identity matrix.

28. A decoder in a communication or broadcasting system supporting a low density parity check (LDPC) code, the decoder comprising:

a transceiver;

a memory; and

at least one processor configured to:

control the transceiver to receive a signal from a transmitter, and

obtain a bit sequence by decoding the signal,

wherein the decoding of the signal is performed based on a parity check matrix,

wherein the parity check matrix is based on a base matrix, a block size Z, and an exponent matrix including at least one integer value,

wherein the exponent matrix is based on a set of block sizes from among a plurality of sets of block sizes,

wherein the set of block sizes is based on the block size Z,

wherein the block size Z is based on a predetermined number,

wherein the predetermined number is based on the base matrix, and

wherein the parity check matrix includes a submatrix consisting of Z×Z zero matrices, and Z×Z circular permutation matrices.

29. The decoder of claim 28 ,

wherein a multiplication of the predetermined number and the block size Z is larger than or equal to a size of information bits.

30. The decoder of claim 28 , wherein the block size is based on a size of information bits.

31. The decoder of claim 28 , wherein the set of block sizes is associated with block sizes determined among {(A+i), 2(A+i), 2 2 (A+i), . . . 2 S (A+i)}, where i=0, 1, 2, . . . , A−1, and A and S are positive integers.

32. The decoder of claim 30 , wherein A is 8 and S is 4.

33. The decoder of claim 28 , wherein the LDPC code is based on one of parity check matrices of at least two different sizes.

34. The decoder of claim 28 , wherein the parity check matrix is based on a circular permutation matrix by applying a circularly shifting operation including one of a modulo operation or a flooring operation.

35. The decoder of claim 28 , wherein the LDPC code is determined based on one of two or more base matrices.

Priority Claims (5)
KR 10-2015-0165114 · Nov 24, 2015 · national
KR 10-2016-0002929 · Jan 8, 2016 · national
KR 10-2016-0102635 · Aug 11, 2016 · national
KR 10-2016-0105807 · Aug 19, 2016 · national
KR 10-2016-0149882 · Nov 10, 2016 · national
Continuity (3)
Continuation 16730412 · Dec 30, 2019
Continuation 15361283 · Nov 25, 2016
Related Publication 20210091884A1 · Mar 25, 2021
Cited By (1)
US 12,542,624