IP Library › Granted Patent US 11,574,929
Granted Patent B2
US 11,574,929 · App. 17/113,249 · Granted Feb 7, 2023

3D ferroelectric memory

Inventors: Sheng-Chen Wang (Hsinchu, TW); Feng-Cheng Yang (Hsinchu County, TW); Meng-Han Lin (Hsinchu, TW); Sai-Hooi Yeong (Zhubei, TW); Yu-Ming Lin (Hsinchu, TW); Han-Jong Chia (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L27/11597H01L27/1159H01L27/11578H01L27/11587H01L29/6684H01L29/66787H01L29/78648
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Quick Facts
Patent No.
US 11,574,929
App. No.
17/113,249
Granted
Feb 7, 2023
Kind
B2
Abstract

A 3D memory array has data storage structures provided at least in part by one or more vertical films that do not extend between vertically adjacent memory cells. The 3D memory array includes conductive strips and dielectric strips, alternately stacked over a substrate. The conductive strips may be laterally indented from the dielectric strips to form recesses. A data storage film may be disposed within these recesses. Any portion of the data storage film deposited outside the recesses may have been effectively removed, whereby the data storage film is essentially discontinuous from tier to tier within the 3D memory array. The data storage film within each tier may have upper and lower boundaries that are the same as those of a corresponding conductive strip. The data storage film may also be made discontinuous between horizontally adjacent memory cells.

Claims (62)

1. A method of forming a memory device, the method comprising:

forming a row of stacks, each stack comprising conductive strips separated by dielectric strips;

selectively etching the conductive strips via trenches between the stacks to create recesses in the stacks;

depositing a data storage film so that a first portion of the data storage film deposits within the recesses in the stacks;

depositing a channel layer after the data storage film, wherein the channel layer deposits over the data storage film;

filling the trenches with a second dielectric;

etching opening through the second dielectric; and

filling the openings with conductive material to form source lines and bit lines.

2. The method of claim 1 , further comprising etching to remove a second portion of the data storage film that deposits in the trenches outside the recesses.

3. The method of claim 1 , further comprising forming intercell dielectric plugs in the trenches before creating the recesses in the stacks.

4. The method of claim 1 , further comprising etching to remove a portion of the channel layer that deposits in the trenches outside the recesses.

5. The method of claim 1 , wherein depositing the channel layer comprises:

depositing a first layer of channel material;

etching to remove channel material that deposits in the trenches outside the recesses; and

depositing a second layer of channel material.

6. A method of forming a memory device, the method comprising:

forming a stack having a plurality of dielectric material layers interleaved with second material layers;

etching a plurality of first trenches in the stack;

forming a plurality of data storage structures in the first trenches, wherein the data storage structures are at levels of the stack corresponding to the second material layers and are separated between adjacent second material layers;

depositing a layer of semiconductor material in the first trenches after forming the plurality of data storage structures; and

forming vertical source lines and bit lines within the first trenches.

7. The method of claim 6 , wherein forming the plurality of data storage structures comprises:

etching to create recesses in sidewalls of the first trenches, wherein the recesses have heights corresponding to the second material layers;

depositing a data storage film in the first trenches; and

etching to separate the data storage film between adjacent second material layers.

8. The method of claim 6 , wherein forming the plurality of data storage structures comprises:

etching to create recesses in sidewalls of the first trenches, wherein the recesses have heights corresponding to the second material layers;

depositing a data storage film in the first trenches; and

etching to separate the data storage film between adjacent second material layers.

9. The method of claim 6 , wherein forming the plurality of data storage structures comprises growing a data storage film by a selective growth process, whereby the data storage film grows from the second material layers but does not grow from the dielectric material layers.

10. The method of claim 6 , further comprising:

etching through the first trenches to remove first portions of the second material layers and create first voids;

filling the first voids with conductive material;

etching a plurality of second trenches in the stack;

etching through the second trenches to remove remaining portions of the second material layers and create second voids; and

filling the second voids with the conductive material.

11. The method of claim 6 , wherein the second material layers comprise metal.

12. The method of claim 6 , further comprising forming periodically spaced conductive plugs in the first trenches prior to forming the plurality of data storage structures.

13. The method of claim 6 , further comprising forming periodically spaced conductive plugs in the first trenches after forming the plurality of data storage structures.

14. The method of claim 6 , wherein forming vertical source lines and bit lines comprises:

filling the trenches with a first dielectric;

etching first holes in the first dielectric;

filling the first holes with a second dielectric;

forming a mask having openings;

etching second holes in one of the first dielectric and the second dielectric through the openings; and

filling the second holes with conductive material.

15. The method of claim 14 , wherein etching the second holes comprises an etch process that is selective between the first dielectric and the second dielectric.

16. The method of claim 15 , wherein two of the second holes are formed through one of the openings by the etch process that is selective.

17. A method of forming a memory device, the method comprising:

forming a stack having dielectric layers interleaved with conductive layers;

etching trenches in the stack;

using a selective etch process to create recesses in sidewalls of the trenches corresponding to the conductive layers;

depositing a data storage film so that a first portion of the data storage film deposits within the recesses;

after depositing the data storage film, depositing a first semiconductor layer so as to line the trenches; and

forming vertical source lines and bit lines within the trenches.

18. The method of claim 17 , further comprising dry etching that removes the data storage film from sidewalls of the dielectric layers.

19. The method of claim 18 , further comprising:

dry etching that removes the first semiconductor layer from sidewalls of the dielectric layers; and

depositing a second semiconductor layer so as to line the trenches.

20. The method of claim 17 , further comprising:

etching to create a staircase pattern on a side of the stack; and

forming vias that land on the conductive layers in the staircase pattern.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2021
From: WANG, SHENG-CHEN; YANG, FENG-CHENG; LIN, MENG-HAN; YEONG, SAI-HOOI; LIN, YU-MING; CHIA, HAN-JONG
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 054887/0876 →
Continuity (2)
Provisional Application 63031019 · May 28, 2020
Related Publication 20210375932A1 · Dec 2, 2021
Cited By (1)
US 12,302,588