IP Library › Granted Patent US 11,715,759
Granted Patent B2
US 11,715,759 · App. 17/118,630 · Granted Aug 1, 2023

Semiconductor device with a single diffusion break structure having a sidewall aligned with a gate sidewall

Inventors: Chien-Heng Liu (Pingtung County, TW); Chia-Wei Huang (Kaohsiung, TW); Hsin-Jen Yu (Tainan, TW); Yung-Feng Cheng (Kaohsiung, TW); Ming-Jui Chen (Hsinchu, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01L29/0649H01L21/76224H01L29/66795H01L29/7851
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Quick Facts
Patent No.
US 11,715,759
App. No.
17/118,630
Granted
Aug 1, 2023
Kind
B2
Abstract

A method for fabricating minimal fin length includes the steps of first forming a fin-shaped structure extending along a first direction on a substrate, forming a first single-diffusion break (SDB) trench and a second SDB trench extending along a second direction to divide the fin-shaped structure into a first portion, a second portion, and a third portion, and then performing a fin-cut process to remove the first portion and the third portion.

Claims (14)

1. A semiconductor device, comprising:

a fin-shaped structure extending along a first direction on a substrate;

a first single diffusion break (SDB) structure extending along a second direction on one side of the fin-shaped structure, wherein the first SDB structure comprises a first side contacting the fin-shaped structure and a second side not contacting any fin-shaped structure;

a second SDB structure extending along the second direction on another side of the fin-shaped structure; and

a first gate structure extending along the second direction directly on a top surface and on one side of the fin-shaped structure, wherein the first SDB structure is adjacent to the first gate structure and a sidewall of the first gate structure is aligned with a sidewall of the fin-shaped structure and a sidewall of the first SDB structure at the same time.

2. The semiconductor device of claim 1 , wherein the second SDB structure comprises a third side contacting the fin-shaped structure and a fourth side not contacting any fin-shaped structure.

3. The semiconductor device of claim 1 , comprising:

a second gate structure extending along the second direction on another side of the fin-shaped structure.

4. The semiconductor device of claim 3 , wherein an edge of the first gate structure is aligned with an edge of the fin-shaped structure.

5. The semiconductor device of claim 3 , wherein an edge of the second gate structure is aligned with an edge of the fin-shaped structure.

6. The semiconductor device of claim 1 , wherein a top surface of the substrate directly under the first SDB structure is lower than a top surface of the substrate directly under the fin-shaped structure.

7. The semiconductor device of claim 1 , wherein a top surface of the substrate directly under the second SDB structure is lower than a top surface of the substrate directly under the fin-shaped structure.

8. The semiconductor device of claim 1 , wherein the first direction is orthogonal to the second direction.

9. The semiconductor device of claim 1 , wherein the first SDB structure is not directly under the first gate structure.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2020
From: LIU, CHIEN-HENG; HUANG, CHIA-WEI; YU, HSIN-JEN; CHENG, YUNG-FENG; CHEN, MING-JUI
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 054612/0412 →
Priority Claims (1)
CN 202011276918.0 · Nov 16, 2020 · national
Continuity (1)
Related Publication 20220157933A1 · May 19, 2022