Companion and host chip photonic integration

1. An article of manufacture comprising:

at least a portion of an integrated circuit wafer that includes at least one layer in which two or more waveguides are formed;

a cavity formed in the integrated circuit wafer;

at least one die comprising a photonic integrated circuit, the die having

at least one edge on which there are two or more optical mode defining structures in proximity to respective optical mode defining structures on at least one surface of the cavity,

a bottom surface secured to a bottom surface of the cavity, and

a top surface on which there is at least one metal contact;

wherein the die is in optical alignment with the portion of the integrated circuit wafer such that a propagation axis of an optical mode defined by at least one optical mode defining structure on the edge of the die is substantially parallel to a propagation axis of an optical mode defined by at least one optical mode defining structure on the surface of the cavity; and

wherein the cavity is shaped to provide closer proximity to the surface of the cavity for a middle portion of the edge of the die than for either of two end portions of the edge of the die.

2. The article of manufacture of claim 1 , wherein a plurality of the two or more optical mode defining structures are aligned to the respective optical mode defining structures on at least one surface of the cavity.

3. The article of manufacture of claim 2 , wherein the respective optical mode defining structures on at least one surface of the cavity comprise ends of respective waveguide couplers that are coupled to waveguides in the layer of the integrated circuit.

4. The article of manufacture of claim 1 , wherein the bottom surface of the die is secured to the bottom surface of the cavity by at least one of: a cured adhesive, a metal or metal alloy, or a flowable oxide.

5. The article of manufacture of claim 1 , wherein the top surface of the die is substantially aligned with a top surface of the integrated circuit wafer.

6. The article of manufacture of claim 1 , wherein the two or more optical mode defining structures are ends of a single curved waveguide in the die.

7. The article of manufacture of claim 1 , wherein the metal contact on the top surface of the die is electrically connected to a portion of the integrated circuit wafer.

8. The article of manufacture of claim 1 , wherein the integrated circuit wafer comprises at least one layer of silicon.

9. The article of manufacture of claim 1 , wherein the cavity is shaped to include inset portions in at least two corners to provide closer proximity to the surface of the cavity for a middle portion of the edge of the die than for either of two end portions of the edge of the die.

10. The article of manufacture of claim 1 , wherein the bottom surface of the cavity includes at least one trench.

11. The article of manufacture of claim 1 , wherein the die includes at least one reflector coupled to at least one of the optical mode defining structures on the edge of the die.

12. A method comprising:

forming two or more waveguides in at least one layer of an integrated circuit wafer;

forming a cavity in the integrated circuit wafer;

securing a die comprising a photonic integrated circuit within the cavity, the securing comprising

aligning two or more optical mode defining structures on at least one edge of the die to respective optical mode defining structures on at least one surface of the cavity, and

forming a bond between a bottom surface of the die and a bottom surface of the cavity; and

forming an electrical connection between at least one metal contact on a top surface of the die to a portion of the integrated circuit wafer;

wherein the die is in optical alignment with the portion of the integrated circuit wafer such that a propagation axis of an optical mode defined by at least one optical mode defining structure on the edge of the die is substantially parallel to a propagation axis of an optical mode defined by at least one optical mode defining structure on the surface of the cavity; and

wherein the cavity is shaped to provide closer proximity to the surface of the cavity for a middle portion of the edge of the die than for either of two end portions of the edge of the die.

13. The method of claim 12 , further comprising dicing the integrated circuit wafer to form a host die that includes the cavity and the die secured within the cavity.

14. The method of claim 12 , wherein the respective optical mode defining structures on at least one surface of the cavity comprise ends of respective waveguide couplers that are coupled to waveguides in the layer of the integrated circuit.

15. The method of claim 12 , wherein the bond secures the bottom surface of the die to the bottom surface of the cavity by at least one of: a cured adhesive, a metal or metal alloy, or a flowable oxide.

16. The method of claim 12 , wherein the top surface of the die is substantially aligned with a top surface of the integrated circuit wafer.

17. The method of claim 12 , wherein the two or more optical mode defining structures are ends of a single curved waveguide in the die.

18. The method of claim 12 , wherein the cavity is shaped to include inset portions in at least two corners to provide closer proximity to the surface of the cavity for a middle portion of the edge of the die than for either of two end portions of the edge of the die.

19. The method of claim 12 , further comprising forming at least one trench in the bottom surface of the cavity.

20. The method of claim 12 , wherein the die includes at least one reflector coupled to at least one of the optical mode defining structures on the edge of the die.