Dynamic block allocation to optimize storage system performance
One or more performance parameters associated with data stored at a storage device of a plurality of storage devices are received by a storage controller. A first number of blocks of the storage device to a high resiliency portion and a second number of blocks of the storage device to a low resiliency portion of the storage device are allocated based on the one or more performance parameters.
1. A system comprising:
a plurality of storage devices; and
a storage controller operatively coupled to the plurality of storage devices, the storage controller comprising a processing device, the processing device to:
determine weighted values of program/erase cycles, based on number of program/erase cycles in each of a plurality of programming modes comprising single-level cell (SLC) mode and at least one further programming mode, for blocks of a storage device of the plurality of storage devices;
receive one or more performance parameters associated with data stored at the storage device of the plurality of storage devices; and
allocate a first number of blocks of the storage device to a high resiliency portion and a second number of blocks of the storage device to a low resiliency portion of the storage device based on the weighted values of program/erase cycles and the one or more performance parameters.
2. The system of claim 1 , wherein the storage device comprises a zoned storage device and wherein the high resiliency portion corresponds to a first zone of the zoned storage device and the low resiliency portion corresponds to a second zone of the zoned storage device.
3. The system of claim 1 , wherein data programmed to the high resiliency portion is programmed using the single-level cell (SLC) mode and data programmed to the low resiliency portion is programmed using a quad-level cell (QLC) mode.
4. The system of claim 1 , wherein the processing device is further to:
modify the first number of blocks allocated to the high resiliency portion and the second number of blocks allocated to the low resiliency portion upon receiving a modification to the one or more performance parameters.
5. The system of claim 1 , wherein the processing device is further to:
allocate one or more blocks of the storage device to the high resiliency portion of the storage device upon determining that a number of program/erase cycles to program data to the one or more blocks exceeds a threshold.
6. The system of claim 1 , wherein the processing device is further to:
rotate which blocks of the storage device are allocated to the high resiliency portion and the low resiliency portion based on a number of program/erase cycles performed on each of the blocks.
7. The system of claim 1 , wherein the weighted values are determined through a machine learning algorithm.
8. A method comprising:
determining weighted values of program/erase cycles, based on number of program/erase cycles in each of a plurality of programming modes comprising single-level cell (SLC) mode and at least one further programming mode, for blocks of a storage device that is of a plurality of storage devices;
receiving, by a processing device of a storage controller, one or more performance parameters associated with data stored at the storage device of the plurality of storage devices; and
allocating a first number of blocks of the storage device to a high resiliency portion and a second number of blocks of the storage device to a low resiliency portion of the storage device based on the weighted values of program/erase cycles and the one or more performance parameters.
9. The method of claim 8 , wherein the storage device comprises a zoned storage device and wherein the high resiliency portion corresponds to a first zone of the zoned storage device and the low resiliency portion corresponds to a second zone of the zoned storage device.
10. The method of claim 8 , wherein data programmed to the high resiliency portion is programmed using the single-level cell (SLC) mode and data programmed to the low resiliency portion is programmed using a quad-level cell (QLC) mode.
11. The method of claim 8 , further comprising:
modifying the first number of blocks allocated to the high resiliency portion and the second number of blocks allocated to the low resiliency portion upon receiving a modification to the one or more performance parameters.
12. The method of claim 8 , further comprising:
allocating one or more blocks to the high resiliency portion of the storage device upon determining that a number of program/erase cycles to program data to the one or more blocks exceeds a threshold.
13. The method of claim 8 , further comprising:
rotating which blocks of the storage device are allocated to the high resiliency portion and the low resiliency portion based on a number of program/erase cycles performed on each of the blocks.
14. The method of claim 13 , wherein the number of program/erase cycles are weighted based on one or more programming modes used for the program/erase cycles.
15. A non-transitory computer readable storage medium storing instructions, which when executed, cause a processing device of a storage controller to:
determine weighted values of program/erase cycles, based on number of program/erase cycles in each of a plurality of programming modes comprising single-level cell (SLC) mode and at least one further programming mode, for blocks of a storage device of a plurality of storage devices;
receive, by the processing device, one or more performance parameters associated with data stored at the storage device of the plurality of storage devices; and
allocate a first number of blocks of the storage device to a high resiliency portion and a second number of blocks of the storage device to a low resiliency portion of the storage device based on the weighted values of program/erase cycles and the one or more performance parameters.
16. The non-transitory computer readable storage medium of claim 15 , wherein the storage device comprises a zoned storage device and wherein the high resiliency portion corresponds to a first zone of the zoned storage device and the low resiliency portion corresponds to a second zone of the zoned storage device.
17. The non-transitory computer readable storage medium of claim 15 , wherein data programmed to the high resiliency portion is programmed using the single-level cell (SLC) mode and data programmed to the low resiliency portion is programmed using a quad-level cell (QLC) mode.
18. The non-transitory computer readable storage medium of claim 15 , wherein the processing device is further to:
modify the first number of blocks allocated to the high resiliency portion and the number of blocks allocated to the low resiliency portion upon receiving a modification to the one or more performance parameters.
19. The non-transitory computer readable storage medium of claim 15 , wherein the processing device is further to:
allocate one or more blocks to the high resiliency portion of the storage device upon determining that a number of program/erase cycles to program data to the one or more blocks exceeds a threshold.
20. The non-transitory computer readable storage medium of claim 15 , wherein the processing device is further to:
rotate which blocks of the storage device are allocated to the high resiliency portion and the low resiliency portion based on a number of program/erase cycles performed on each of the blocks.