IP Library Granted Patent US 11,949,343
Granted Patent B2
US 11,949,343 · App. 17/130,779 · Granted Apr 2, 2024

Systems and methods for controlling multi-level diode-clamped inverters using space vector pulse width modulation (SVPWM)

Inventor: Subrata K Mondal (South Windsor, CT)
Assignee: Inertech IP LLC
H02M7/487H02J9/061H02M3/04H02M1/0845H02M7/4835H02M7/49H02M7/53873H02M7/53875H02M7/53876
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Quick Facts
Patent No.
US 11,949,343
App. No.
17/130,779
Granted
Apr 2, 2024
Kind
B2
Abstract

Control systems for a multi-level diode-clamped inverter and corresponding methods include a processor and a digital logic circuit forming a hybrid controller. The processor identifies sector and region locations based on a sampled reference voltage vector V* and angle Θ e *. The processor then selects predefined switching sequences and pre-calculated turn-on time values based on the identified sector and region locations. The digital logic circuit generates PWM switching signals for driving power transistors of a multi-level diode-clamped inverter based on the turn-on time values and the selected switching sequences. The control system takes care of the existing capacitor voltage balancing issues of multi-level diode-clamped inverters while supplying both active and reactive power to an IT load. Using the control system, one can generate a symmetrical PWM signal that fully covers the linear under-modulation region.

Claims (42)

1. A control system for a multi-level inverter, comprising:

a processor and a memory configured to:

receive a reference voltage vector and an angle;

identify a sector among sectors of a multi-level inverter including at least two levels, yielding an identified sector;

identify a region among regions of the multi-level inverter based on the reference voltage vector and angle, yielding an identified region; and

select a switching sequence and turn-on time values based on the identified sector and the identified region; and

a circuit configured to generate pulse width modulation (PWM) switching signals for the regions of the multi-level inverter and the sectors of the multi-level inverter based on the turn-on time values and the switching sequence,

wherein each of the regions includes a same number of the sectors.

2. The control system according to claim 1 , further comprising a counter configured to count from 0 to Ts/2 and then from Ts/2 to 0, where Ts is a sampling period.

3. The control system of claim 1 , wherein the circuit is implemented by a Field Programmable Gate Array (FPGA) or an Application Specific Integrated Circuit (ASIC).

4. The control system of claim 1 , wherein the processor and the memory are implemented by a digital signal processor (DSP).

5. The control system of claim 1 , wherein the processor and the memory are further configured to:

convert the reference voltage vector and the angle into X and Y coordinate point values in the identified sector; and

identify a region based on the X and Y coordinate point values.

6. The control system of claim 5 , wherein the identifying the region includes comparing the X and Y coordinate point values to segments of triangles, which represent regions, in a vector space.

7. The control system of claim 5 , wherein the turn-on time values and the switching sequence are predetermined for each sector and region.

8. The control system of claim 1 , wherein the turn-on time values and the switching sequence are stored in a look-up table.

9. The control system of claim 1 , wherein the sectors are sectors A-F.

10. A method of controlling a multi-level inverter, comprising:

receiving a reference voltage vector and an angle;

identifying a sector among sectors of a multi-level inverter including at least two levels, yielding an identified sector;

identifying a region among regions of the multi-level inverter based on the reference voltage vector and the angle, yielding an identified region;

selecting a switching sequence and turn-on time values based on the identified region; and

generating pulse width modulation (PWM) switching signals for the regions of the multi-level inverter and the sectors of the multi-level inverter based on the turn-on time values and the switching sequence,

wherein each of the regions includes a same number of the sectors.

11. The method of claim 10 , further comprising:

converting the reference voltage vector and the angle into X and Y coordinate point values; and

identifying the region based on the X and Y coordinate point values.

12. The method of claim 11 , wherein the identifying the region includes comparing the X and Y coordinate point values to segments of triangles, which represent regions, in a vector space.

13. The method of claim 10 , wherein the turn-on time values and switching sequence are predetermined for each sector and region.

14. The method of claim 10 , wherein the turn-on time values and the switching sequence are stored in a look-up table stored in a storage memory.

15. An energy storage system comprising:

an energy storage device;

a DC-DC converter coupled to the energy storage device;

a multi-level inverter coupled to the DC-DC converter, the multi-level inverter including at least two levels; and

a controller for the multi-level inverter, the controller comprising:

a processor and a memory configured to:

receive a reference voltage vector and an angle;

identify a sector among sectors of the multi-level inverter and a region among regions of the multi-level inverter based on the reference voltage vector and the angle, yielding an identified sector and an identified region; and

select a switching sequence and turn-on time values based on the identified sector and the identified region; and

a circuit configured to generate pulse width modulation (PWM) switching signals for the regions of the multi-level inverter and the sectors of the multi-level inverter based on the turn-on time values and the switching sequence,

wherein each of the regions includes a same number of the sectors.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2021
From: MONDAL, SUBRATA K.
To: INERTECH IP LLC
Reel/Frame 055017/0195 →
Continuity (6)
Continuation 16545974 · Aug 20, 2019
Continuation 15913387 · Mar 6, 2018
Continuation 15493978 · Apr 21, 2017
Continuation PCTUS2015056785 · Oct 21, 2015
Provisional Application 62066672 · Oct 21, 2014
Related Publication 20210184595A1 · Jun 17, 2021