Granted Patent B2

US 12,443,453 · App. 17/134,252 · Granted Oct 14, 2025

Inventors: Monica Gupta (Hillsboro, OR); Russell Fenger (Beaverton, OR); Andrew J. Herdrich (Hillsboro, OR); Rajshree Chabukswar (Sunnyvale, CA); Jumnit Hong (Portland, OR); Sneha Gohad (San Jose, CA)

Assignee: Intel Corporation

G06F9/5038G06F9/3851G06F9/5016G06F2209/5021

Abstract

Claims (36)

1. An apparatus comprising:

resource sharing hardware to control a shared resource; and

a plurality of cores to share the shared resource, including a first core, the first core including:

first execution circuitry to execute a first plurality of threads, the plurality of threads including a first thread and a second thread;

a first plurality of registers programmable by software, including:

a first register to store a first identifier of the first thread, a first class of service value to allow the software to directly control access to the shared resource by the first thread, and a first priority tag to indicate a first priority of the first thread relative to a second priority of the second thread, wherein the first priority is higher than the second priority; and

a second register to store a second identifier of the second thread, a second class of service value to allow the software to directly control access to the shared resource by the second thread, and a second priority tag to indicate the second priority of the second thread relative to the first priority of the first thread;

wherein the resource sharing hardware is to control access to the shared resource by the first thread and the second thread dynamically, including allocating, based on the first class of service value, at least a portion of the shared resource to the first thread; measuring dynamic demand for the shared resource; and re-allocating, based on the second priority tag and measured dynamic demand for the shared resource, the portion of the shared resource from the first thread to the second thread.

2. The apparatus of claim 1 , further comprising the shared resource inside the first core.

3. The apparatus of claim 1 , wherein the shared resource is a cache.

4. The apparatus of claim 1 , wherein the resource sharing hardware is outside the first core.

5. The apparatus of claim 4 , wherein a second core of the plurality of cores includes:

second execution circuitry to execute a third thread; and

a third register programmable by the software to store a third identifier of the third thread and a third priority tag to indicate a third priority of the third thread relative to the first priority and the second priority;

wherein the resource sharing hardware is also to use the first priority and the third priority to control access to the shared resource by the first thread and the third thread.

6. The apparatus of claim 5 , wherein the shared resource is memory bandwidth.

7. The apparatus of claim 5 , wherein the shared resource is power.

8. The apparatus of claim 1 , further comprising a third register programmable by the software to indicate a mapping between priority tags to be used by the software and priority levels to be used by the resource sharing hardware.

9. A method comprising:

storing, in a first register in a core, a first identifier of a first thread to be executed by the core, a first class of service value to allow software to directly control access to a shared resource by the first thread, and a first priority tag to indicate a first priority of the first thread relative to a second priority of a second thread to be executed by the core, wherein the first priority is higher than the second priority;

storing, in a second register in the core, a second identifier of the second thread, a second class of service value to allow the software to directly control access to the shared resource by the second thread, and a second priority tag to indicate the second priority of the second thread relative to the first priority of the first thread;

controlling, by resource sharing hardware, access to the shared resource by the first thread and the second thread dynamically, including allocating, based on the first class of service value, at least a portion of the shared resource to the first thread; measuring dynamic demand for the shared resource; and re-allocating, based on the second priority tag and measured dynamic demand for the shared resource, the portion of the shared resource from the first thread to the second thread.

10. The method of claim 9 , further comprising:

storing, in a third register in a second core, a third identifier of a third thread to be executed by the second core and a third priority tag to indicate a third priority of the third thread relative to the first priority and the second priority; and

using, by the resource sharing hardware, the first priority and the third priority to control access to the shared resource by the first thread and the third thread.

11. A system comprising:

resource sharing hardware to control a shared resource; and

a plurality of cores to share the shared resource, including a first core having a first architecture and a second core having a second architecture, wherein:

the first core includes:

first execution circuitry to execute a first thread;

a first register programmable by software to store a first identifier of the first thread, a first class of service value to allow the software to directly control access to the shared resource by the first thread, and a first priority tag to indicate a first priority of the first thread relative to a second priority of the second thread, wherein the first priority is higher than the second priority;

the second core includes:

second execution circuitry to execute a second thread;

a second register programmable by software to store a second identifier of the second thread, a second class of service value to allow the software to directly control access to the shared resource by the second thread, and a second priority tag to indicate a second priority of the second thread relative to the first priority of the first thread; and

the resource sharing hardware is to control access to the shared resource by the first thread and the second thread dynamically, including allocating, based on the first class of service value, at least a portion of the shared resource to the first thread; measuring dynamic demand for the shared resource; and re-allocating, based on the second priority tag and measured dynamic demand for the shared resource, the portion of the shared resource from the first thread to the second thread.

12. The system of claim 11 , wherein the first architecture is different than the second architecture.

Assignments (1)

Continuity (1)

References Cited (19)