IP Library Granted Patent US 11,430,935
Granted Patent B2
US 11,430,935 · App. 17/134,549 · Granted Aug 30, 2022

Light emitting diode structure

Inventor: Shiou-Yi Kuo (Hsinchu, TW)
Assignee: Lextar Electronics Corporation
H01L33/62H01L33/22H01L33/42H01L33/52
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Quick Facts
Patent No.
US 11,430,935
App. No.
17/134,549
Granted
Aug 30, 2022
Kind
B2
Abstract

A light emitting diode includes a base layer, an electric contact layer, a semiconductor stack, and an insulation layer. The base layer has a maximum of a first width. The electric contact layer has a maximum of a second width and is disposed on the base layer. The semiconductor stack disposed on the electric contact layer has a maximum of a third width, and includes a first type semiconductor layer, a light emitting layer, and a second type semiconductor layer stacked in sequence, wherein a width of the first type semiconductor layer is smaller than the maximum of the third width. The insulation layer covers the sidewalls of the base layer, the electric contact layer, and the semiconductor stack. The maximum of the second width is greater than the maximum of the third width and the maximum of the second width is less than the maximum of the first width.

Claims (17)

1. A light emitting diode structure, comprising:

a base layer having a maximum of a first width, wherein the base layer comprises a distributed bragg reflector;

an electric contact layer having a maximum of a second width and disposed on the base layer;

a semiconductor stack having a maximum of a third width and disposed on the electric contact layer, the semiconductor stack comprising a first type semiconductor layer, a light emitting layer, and a second type semiconductor layer stacked in sequence, wherein a width of the first type semiconductor layer, a width of the light emitting layer, and a width of the second type semiconductor layer are substantially smaller than or equal to the maximum of the third width; and

an insulation layer at least covering a sidewall of the base layer, a sidewall of the electric contact layer, a sidewall of the semiconductor stack, and a sidewall of the distributed bragg reflector, wherein the maximum of the second width is greater than the maximum of the third width, and the maximum of the second width is less than or equal to the maximum of the first width.

2. The light emitting diode structure of claim 1 , wherein the electric contact layer is a single layer, and the maximum of the second width is substantially equal to the maximum of the first width.

3. The light emitting diode structure of claim 1 , wherein the electric contact layer comprises an ohmic contact layer and a first metal layer, the ohmic contact layer with a maximum of a fourth width is disposed between the semiconductor stack and the base layer, the first metal layer with a maximum of a fifth width is disposed between the ohmic contact layer and the base layer, the maximum of the fourth width is smaller than or substantially equal to the maximum of the first width, and the maximum of the fifth width is substantially equal to the maximum of the first width.

4. The light emitting diode structure of claim 1 , further comprising an electrode layer disposed on the semiconductor stack.

5. The light emitting diode structure of claim 4 , wherein the electrode layer is transparent for a light emitted from the light emitting layer.

6. The light emitting diode structure of claim 4 , wherein the electrode layer is a second metal layer.

7. The light emitting diode structure of claim 1 , wherein the electric contact layer is transparent for a light emitted by the light emitting layer.

8. A light emitting diode structure, comprising:

a base layer having a maximum of a first width;

an electric contact layer having a maximum of a second width and disposed on the base layer;

a semiconductor stack having a maximum of a third width and disposed on the electric contact layer, the semiconductor stack comprising a first type semiconductor layer, a light emitting layer, and a second type semiconductor layer stacked in sequence, wherein a width of the first type semiconductor layer, a width of the light emitting layer, and a width of the second type semiconductor layer are substantially smaller than or equal to the maximum of the third width; and

an insulation layer at least covering a sidewall of the base layer, a sidewall of the electric contact layer, and a sidewall of the semiconductor stack,

wherein the maximum of the second width is greater than the maximum of the third width, the maximum of the second width is less than or equal to the maximum of the first width, the electric contact layer comprises an ohmic contact layer and a first metal layer, the ohmic contact layer with a maximum of a fourth width is disposed between the semiconductor stack and the base layer, the first metal layer with a maximum of a fifth width is disposed between the ohmic contact layer and the base layer, the maximum of the fourth width is smaller than or substantially equal to the maximum of the first width, the maximum of the fifth width is substantially equal to the maximum of the first width, and the maximum of the fourth width is substantially equal to the maximum of the third width.

Assignments (2)
MERGER Recorded Mar 27, 2026
From: LEXTAR ELECTRONICS CORPORATION
To: ENNOSTAR CORPORATION
Reel/Frame 075286/0822 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2020
From: KUO, SHIOU-YI
To: LEXTAR ELECTRONICS CORPORATION
Reel/Frame 054859/0857 →
Cited By (1)
US 12,433,081