IP Library Granted Patent US 11,527,660
Granted Patent B2
US 11,527,660 · App. 17/137,643 · Granted Dec 13, 2022

Semiconductor device with a lifetime killer region in the substrate

Inventor: Yasuyuki Hoshi (Matsumoto, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H01L29/808H01L29/0619
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Quick Facts
Patent No.
US 11,527,660
App. No.
17/137,643
Granted
Dec 13, 2022
Kind
B2
Abstract

A semiconductor device having, in a plan view thereof, an active region and a termination region that surrounds a periphery of the active region. The device includes a semiconductor substrate containing a wide bandgap semiconductor, a first-conductivity-type region provided in the semiconductor substrate, spanning from the active region to the termination region, a plurality of second-conductivity-type regions provided between the first-conductivity-type region and the first main surface of the semiconductor substrate in the active region, a first electrode provided on a first main surface of the semiconductor substrate and electrically connected to the second-conductivity-type regions, a second electrode provided on the second main surface of the semiconductor substrate and electrically connected to the first-conductivity-type region, and a lifetime killer region provided in the first-conductivity-type region and spanning from the active region to the termination region. In the active region, pn junctions between the first-conductivity-type region and the second-conductivity-type regions form a vertical semiconductor device element.

Claims (22)

1. A semiconductor device having, in a plan view thereof, an active region and a termination region that surrounds a periphery of the active region, the device comprising:

a semiconductor substrate containing a wide bandgap semiconductor having a bandgap wider than that of silicon, the semiconductor substrate having a first main surface and a second main surface opposite to each other;

a first-conductivity-type region provided in the semiconductor substrate, spanning from the active region to the termination region;

a plurality of second-conductivity-type regions provided in the semiconductor substrate, between the first-conductivity-type region and the first main surface of the semiconductor substrate and in the active region;

a first electrode provided on the first main surface of the semiconductor substrate and electrically connected to the second-conductivity-type regions;

a second electrode provided on the second main surface of the semiconductor substrate and electrically connected to the first-conductivity-type region; and

a lifetime killer region in which a lifetime of minority carriers is shortened, the lifetime killer region being provided in the first-conductivity-type region and spanning from the active region to the termination region,

wherein in the active region

the first-conductivity-type region and the second-conductivity-type regions form a plurality of pn junctions therebetween, to thereby form a vertical semiconductor device element, current passing through the vertical semiconductor device element in a direction from the first main surface of the semiconductor substrate toward the second main surface thereof or in a direction from the second main surface of the semiconductor substrate toward the first main surface thereof, and

the first electrode and the second electrode respectively form a first electrode and a second electrode of the vertical semiconductor device element; and

the lifetime killer region is of an L-shape in a cross-sectional view of the semiconductor substrate, and extends to the first main surface of the semiconductor substrate in the termination region.

2. The semiconductor device according to claim 1 , wherein

the lifetime killer region, at the first main surface of the semiconductor substrate in the termination region, surrounds the periphery of the active region in the plan view.

3. The semiconductor device according to claim 1 , wherein

the lifetime killer region has a plurality of recombination centers therein caused by an impurity state of helium or protons in the bandgap of the wide bandgap semiconductor.

4. The semiconductor device according to claim 1 , wherein

the lifetime killer region includes a plurality of lifetime killer regions provided in a striped pattern extending in a direction parallel to the first main surface of the semiconductor substrate.

5. The semiconductor device according to claim 1 , wherein

the lifetime killer region is provided in an entire area of the first-conductivity-type region in the plan view.

6. The semiconductor device according to claim 1 , wherein

a depletion layer spreads in the first-conductivity-type region from the active region toward the termination region during reverse bias of the pn junctions.

7. he semiconductor device according to claim 1 , further comprising a plurality of current spreading regions formed between the first-conductivity-type region and the second- conductivity-type regions, so as to cause a depletion layer to spread in the first-conductivity-type region from the active region toward the termination region during reverse bias of the pn junctions.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2020
From: HOSHI, YASUYUKI
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 054775/0024 →
Priority Claims (1)
JP JP2020-034359 · Feb 28, 2020 · national
Continuity (1)
Related Publication 20210273117A1 · Sep 2, 2021
Cited By (1)
US 12,408,401