On-chip code breakpoint debugging method, on-chip processor, and chip breakpoint debugging system
View Patent ↗The present application discloses an on-chip code breakpoint debugging method, an on-chip processor, and a chip breakpoint debugging system. The on-chip processor starts and executes an on-chip code, and an output function is set at a breakpoint position of the on-chip code. The on-chip processor obtains output information output by the output function, and stores the output information into an off-chip memory. In one embodiment, according to the output information, output by the output function and stored in the off-chip memory, the on-chip processor can obtain execution conditions of the breakpoints of the on-chip code in real time, achieve the purpose of debugging multiple breakpoints in the on-chip code concurrently, and improve debugging efficiency.
1. An on-chip code breakpoint debugging method, comprising:
an on-chip processor configured to execute an on-chip code, wherein an output function is set at a breakpoint of the on-chip code;
obtaining, by the on-chip processor, output information output by the output function;
outputting the output information to an off-chip memory; and
storing the output information in the off-chip memory;
wherein the outputting of the output information to the off-chip memory comprises:
querying, by the on-chip processor, a hardware status of the off-chip memory by using a first thread, wherein the hardware status includes a hardware interrupt status or a hardware non-interrupt status, wherein, the hardware interrupt status of the off-chip memory is a status that the off-chip memory enters after triggering an interrupt function according to the received output information, and
when the on-chip processor determines that the status of the off-chip memory is the hardware interrupt status, outputting, by the first thread, the output information in the off-chip memory.
2. The method of claim 1 , further comprising:
determining, by the on-chip processor, a breakpoint debugging result of the on-chip code according to the output information while the on-chip code continues to be executed.
3. The method of claim 1 , wherein, the output function includes a print number function or a print string function.
4. The method of claim 1 , wherein, the output information includes preset number information, or string information, or output information of functions other than the output function in the on-chip code.
5. The method of claim 1 , wherein, the obtaining, by the on-chip processor, the output information output by the output function includes:
obtaining, by the on-chip processor, the output information from a RAM of a system on chip.
6. The method of claim 1 , further comprising:
outputting, by the on-chip processor, the output information to the off-chip memory using a driver.
7. The method of claim 6 , wherein, the outputting, by the on-chip processor, the output information in the off-chip memory using a driver includes:
when the output information in the off-chip memory is updated, outputting, by the on-chip processor, updated output information.
8. The method of claim 7 , wherein, when the output information in the off-chip memory is updated, outputting, by the on-chip processor, the updated output information includes:
querying, by the on-chip processor, the output information in the off-chip memory using a second thread,
when the output information is updated, update a status identifier of the off-chip memory using the second thread,
querying, by the on-chip processor, the status identifier of the off-chip memory by using a third thread, and
when the on-chip processor determines that the status identifier is updated, using the third thread to output the updated output information in the off-chip memory.
9. The method of claim 8 , wherein, the querying, by the on-chip processor, the output information in the off-chip memory by using the second thread includes: starting, by the on-chip processor, the second thread to query the output information in the off-chip memory by using a driver, and
wherein the querying, by the on-chip processor, the status identifier of the off-chip memory by using the third thread includes: starting, by the on-chip processor, the third thread to query the status identifier of the off-chip memory by using a HOST program; and
wherein, the status identifier of the off-chip memory includes a read/unread identifier.
10. An on-chip processor, comprising:
a starting circuit configured to execute an on-chip code, wherein an output function is set at a breakpoint of the on-chip code;
an output information obtaining circuit configured to obtain output information output by the output function;
an outputting circuit to output the output information to an off-chip memory; and
a storage circuit configured to store the output information in the off-chip memory;
wherein the outputting circuit is configured to:
query the output information in the off-chip memory using a first thread,
when the outputting circuit determines that the output information is updated, use the first thread to update a status identifier of the off-chip memory,
query the status identifier of the off-chip memory by using a second thread, and
when the outputting circuit determines that the status identifier is updated, use the second thread to output the updated output information in the off-chip memory, wherein the status identifier of the off-chip memory includes a read/unread identifier.
11. The processor of claim 10 , further comprising:
a breakpoint debugging result determining circuit configured to determine a breakpoint debugging result of the on-chip code according to the output information in the off-chip memory.
12. The processor of claim 10 , wherein, the output function includes a print number function or a print string function.
13. The processor of claim 10 , wherein, the output information includes preset number information, or string information, or output information of functions other than the output function in the on-chip code.
14. The processor of claim 10 , wherein, the output information obtaining circuit includes:
the on-chip processor is configured to obtain the output information of the output function from a RAM of a system on chip.
15. The processor of claim 10 , wherein the outputting circuit includes:
a first outputting sub-circuit configured to output the output information to the off-chip memory using a driver;
a second—outputting sub-circuit configured to output updated output information to update the output information in the off-chip memory.
16. The processor of claim 15 , wherein, when the second outputting sub-circuit queries the output information in the off-chip memory using the first thread,
a driver starts the first thread to query the output information in the off-chip memory, and
when the second outputting sub-circuit queries the status identifier of the off-chip memory by using the second thread,
a HOST program starts the second thread to query the status identifier of the off-chip memory.
17. The processor of claim 16 , wherein, the outputting circuit includes:
a third outputting sub-circuit configured to query a hardware status of the off-chip memory using a third thread, wherein the hardware status includes a hardware interrupt status or a hardware non-interrupt status, wherein, the hardware interrupt status of the off-chip memory is a status that the off-chip memory enters after triggering an interrupt function according to the received output information, when the third outputting sub-circuit determines that the status of the off-chip memory is the hardware interrupt status, the third thread outputs the output information in the off-chip memory.
18. A chip breakpoint debugging system, comprising: a breakpoint debugging chip and an off-chip memory, wherein,
the breakpoint debugging chip includes the on-chip processor of claim 10 , and is configured to perform on-chip breakpoint debugging; and
the off-chip memory is configured to store output information of the breakpoint debugging chip.