Semiconductor device and method of manufacture

1. A method comprising:

forming a redistribution structure comprising a first metallization pattern on a first side of the redistribution structure;

forming an interconnect structure comprising a second metallization pattern on a first side of the interconnect structure;

bonding the interconnect structure to the redistribution structure, comprising:

depositing solder paste on the first metallization pattern, wherein the solder paste is a first material;

forming solder bumps on the second metallization pattern, the solder bumps physically and electrically coupled to the second metallization pattern, wherein the solder bumps are a second material that is different from the first material, wherein forming the solder bumps includes performing a first reflow process resulting in the solder bumps;

placing the solder bumps in physical contact with the solder paste;

performing a second reflow process at a first temperature that melts the solder paste and transforms the solder paste into a solder support structure, the second reflow process physically coupling the solder bumps of the interconnect structure to the redistribution structure by the solder support structure; and

after performing the second reflow process, performing a third reflow process at a second temperature that melts the solder support structure and melts the solder bumps together, wherein the second temperature is greater than the first temperature, the third reflow process forming connectors between the first metallization pattern and the second metallization pattern; and

after performing the third reflow process, depositing an underfill between the redistribution structure and the interconnect structure, the underfill laterally surrounding an interface between the connectors and the first metallization pattern.

2. The method of claim 1 , wherein the solder paste comprises tin and bismuth.

3. The method of claim 1 , wherein the solder bumps are bismuth-free.

4. The method of claim 1 , wherein the first temperature is between 140° C. and 180° C.

5. The method of claim 1 , wherein the second temperature is between 210° C. and 250° C.

6. The method of claim 1 , further comprising connecting a semiconductor device to a second side of the redistribution structure.

7. The method of claim 1 , wherein the connectors have a homogenous composition.

8. The method of claim 7 , wherein the connectors comprise between 4% and 20% bismuth by mass.

9. The method of claim 1 , wherein after performing the third reflow process, warpage of the interconnect structure is less than 1400 μm.

10. A method comprising:

forming a plurality of regions of solder paste on a redistribution structure, wherein the solder paste has a first melting temperature;

forming a plurality of solder bumps on an interconnect structure, wherein the solder bumps have a second melting temperature that is greater than the first melting temperature, the solder bumps formed by a first reflow process;

placing the plurality of solder bumps on the plurality of regions of solder paste, the plurality of solder bumps being affixed to the interconnect structure;

performing a second reflow process at a first reflow temperature for a first duration of time, wherein the first reflow temperature is less than the second melting temperature, the second reflow process reflowing the plurality of regions of solder paste thereby respectively attaching the plurality of solder bumps of the interconnect structure to the redistribution structure, the second reflow process transforming the plurality of regions of solder paste into a plurality of solder support structures; and

after performing the second reflow process, performing a third reflow process at a second reflow temperature for a second duration of time, wherein the second reflow temperature is greater than the second melting temperature, the third reflow process melting respective bumps of the plurality of solder bumps together with respective solder support structures of the plurality of solder support structures.

11. The method of claim 10 , wherein a mass ratio of a region of solder paste to a solder bump is between 1:8 and 1:16.

12. The method of claim 10 , wherein the first duration of time is between 100 seconds and 200 seconds.

13. The method of claim 10 , wherein the second duration of time is between 50 seconds and 80 seconds.

14. The method of claim 10 , wherein the interconnect structure comprises an organic substrate.

15. The method of claim 10 , wherein a ratio of a width of a region of solder paste to the width of a solder bump is between 1:2 and 1:4.

16. A method of forming a semiconductor package, comprising:

depositing solder paste on first contact pads of a first package component, wherein the solder paste comprises bismuth;

depositing solder material on second contact pads of a second package component, wherein the solder material is free of bismuth, the solder material attached by a first reflow process to the second contact pads of the second package component;

performing a second reflow process comprising a first heating process at a first temperature that melts the solder paste and transforms the solder paste into a solder bonding structure, the solder bonding structure bonding the solder material to respective first contact pads of the first package component, wherein the solder material remains a solid during the first heating process, thereby coupling the second package component to the first package component by the solder material, an interface remaining between the solder material and the solder bonding structure;

after performing the first heating process and while the second package component is coupled to the first package component, performing a third reflow process comprising a second heating process at a second temperature that melts the solder bonding structure and the solder material to form connectors that bond the first contact pads and the second contact pads together; and

after performing the second heating process, depositing an underfill material between the first package component and the second package component, the underfill material extending continuously from the first package component to the second package component and laterally encapsulating the second package component; and

cutting through the underfill material along a side of the second package component and through the first package component.

17. The method of claim 16 , wherein the second temperature is between 30° C. and 70° C. greater than the first temperature.

18. The method of claim 16 , wherein the solder paste has a mass percentage of bismuth between 35% and 58%.

19. The method of claim 16 , wherein the first temperature is less than 180° C.

20. The method of claim 1 , wherein the underfill extends toward the interconnect structure and completely covers sidewalls of the interconnect structure.