Smooth waveguide structures and manufacturing methods
In integrated optical structures (e.g., silicon-to-silicon-nitride mode converters) implemented in semiconductor-on-insulator substrates, wire waveguides whose sidewalls substantially consist of portions coinciding with crystallographic planes and do not extend laterally beyond the top surface of the wire waveguide may provide benefits in performance and/or manufacturing needs. Such wire waveguides may be manufactured, e.g., using a dry-etch of the semiconductor device layer down to the insulator layer to form a wire waveguide with exposed sidewalls, followed by a smoothing crystallographic wet etch.
1. A photonic integrated circuit (PIC) structure comprising:
a semiconductor-on-insulator substrate comprising a semiconductor device layer;
a wire waveguide formed in the semiconductor device layer, the wire waveguide having a top surface and sidewalk and comprising a tapered region decreasing in width towards a narrow end; and
a second waveguide disposed above or below the tapered region of the wire waveguide at the narrow end, the second waveguide made from a different material than the wire waveguide, and the second waveguide and wire waveguide together forming an optical mode converter,
wherein the sidewalls, along a length of the wire waveguide in the tapered region, do not extend laterally beyond the top surface of the wire waveguide and substantially consist of sidewall portions coinciding with crystallographic planes of the wire waveguide.
2. The PIC structure of claim 1 , wherein the wire waveguide has a bottom surface formed at an interface with an insulator layer of the semiconductor-on-insulator substrate.
3. The PIC structure of claim 1 , wherein the sidewall portions comprise, along the length of the wire waveguide in the tapered region, one or more substantially planar upper portions extending from a top edge of the wire waveguide at an acute angle with respect to the top surface of the wire waveguide and one or more substantially planar lower portions extending from a bottom edge of the wire waveguide at an acute angle with respect to a bottom surface of the wire waveguide, the upper and lower portions meeting at a medial horizontal plane of the wire waveguide.
4. The PIC structure of claim 1 , wherein a cross section of the wire waveguide has an hourglass shape.
5. The PIC structure of claim 1 , wherein the sidewalls have sub-nanometer surface roughness along the length in the tapered region.
6. The PIC structure of claim 1 , wherein the sidewall portions are atomically smooth.
7. The PIC structure of claim 1 , wherein the substrate is a silicon-on-insulator substrate.
8. The PIC structure of claim 1 , further comprising a rib waveguide formed in the semiconductor device layer on top of and parallel to the wire waveguide.
9. The PIC structure of claim 8 , wherein the rib waveguide is tapered in at least one of width and height in a same direction along a length of the rib waveguide as the wire waveguide.
10. The PIC structure of claim 9 , wherein the rib waveguide is vertically tapered down to vanishing.
11. The PIC structure of claim 1 , wherein a refractive index of a material of the wire waveguide is greater than a refractive index of the material of the second waveguide.
12. The PIC structure of claim 11 , wherein the wire waveguide is made of silicon and the second waveguide is made of silicon nitride.
13. The PIC structure of claim 12 , further comprising a silicon-nitride grating coupler coupled to the second waveguide and one or more silicon devices coupled to the wire waveguide.
14. The PIC structure of claim 1 , wherein the sidewall portions result from a crystallographic wet-etch of exposed vertical sidewalk of an initial wire waveguide structure etched into the semiconductor device layer.
15. The PIC structure of claim 1 , wherein the semiconductor device layer and the wire waveguide formed therein are made from silicon material, and wherein the wire waveguide has a cross section parallel to a (011) crystal plane of the semiconductor device layer.
16. The PIC structure of claim 1 , wherein an effective refractive index of the tapered region of the wire waveguide matches an effective refractive index of the second waveguide above or below the tapered region.
17. The PIC structure of claim 1 , wherein the mode converter is included in a finite impulse response filter.
18. The PIC structure of claim 17 , wherein the finite impulse response filter comprises an asymmetric Mach-Zehnder interferometer or an arrayed waveguide grating.
19. The PIC structure of claim 18 , wherein a delay of the finite impulse response filter is implemented entirely in the material of the second waveguide.