Semiconductor structure with wave shaped erase gate and forming method thereof
An electrically erasable programmable read only memory (EEPROM) includes a substrate, isolation structures, a row of erase gate and a row of floating gates. The isolation structures are defined in the substrate to extend in a first direction. The row of erase gate having a wave shape is disposed across the substrate. The row of floating gates having staggered islands is disposed parallel to the row of erase gate. A method of forming said electrically erasable programmable read only memory (EEPROM) is also provided.
1. A semiconductor structure with wave shaped erase gate, comprising:
a substrate;
isolation structures defined in the substrate to extend in a first direction;
an erase gate having a wave shape disposed across the substrate when viewed from a top view, wherein the wave shape has first parts connecting to second-one parts and second-two parts, wherein the first parts, the second-one parts and the second-two parts are directly connected with each other, wherein the first parts, the second-one parts, the first parts and the second-two parts are alternatingly and repeatingly arranged, wherein the first parts extend along a second direction, the second-one parts extend along a third direction and the second-two parts extend along a fourth direction, and wherein the third direction and the fourth direction are not orthogonal to the second direction, and wherein the first parts overlap the substrate, the second-one parts and the second-two parts overlap the isolation structures, but the first parts do not overlap the isolation structures; and
floating gates having staggered islands disposed parallel to the erase gate when viewed from the top view.
2. The semiconductor structure with wave shaped erase gate according to claim 1 , further comprising:
a word line having the wave shape disposed parallel to the erase gate and at a side of the floating gates opposite to the erase gate.
3. The semiconductor structure with wave shaped erase gate according to claim 1 , wherein the second-one parts and the second-two parts extend along different directions.
4. The semiconductor structure with wave shaped erase gate according to claim 1 , wherein the second direction is orthogonal to the first direction.
5. The semiconductor structure with wave shaped erase gate according to claim 1 , wherein the third direction and the fourth direction have common absolute values of slope.
6. The semiconductor structure with wave shaped erase gate according to claim 1 , wherein two of the first parts adjacent to each other are dislocated.
7. The semiconductor structure with wave shaped erase gate according to claim 1 , wherein a length of a gap between two adjacent floating gates is defined as g, and a length of a shifting between two adjacent floating gates is defined as s, and wherein a ratio of the g and the s is between 63:45 to 45:63.
8. The semiconductor structure with wave shaped erase gate according to claim 1 , further comprising:
a source line located right below the erase gate.