IP Library › Granted Patent US 11,805,592
Granted Patent B2
US 11,805,592 · App. 17/155,324 · Granted Oct 31, 2023

Circuit board assembly and electronic device

Inventors: Chaojun Deng (Dongguan, CN); Fei Ma (Nanjing, CN); Wei Fang (Shenzhen, CN); Zhiwen Yang (Dongguan, CN); Chungang Li (Dongguan, CN); Shun Hao (Dongguan, CN)
Assignee: HUAWEI TECHNOLOGIES CO., LTD.
H05K1/0203G02B6/4269G02B6/4284H05K1/181H05K7/023H05K7/026H05K7/20409
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Quick Facts
Patent No.
US 11,805,592
App. No.
17/155,324
Granted
Oct 31, 2023
Kind
B2
Abstract

A circuit board assembly is applied to the field of electronic communications technologies to resolve a prior-art heat dissipation problem of a circuit board. The circuit board assembly combines, on a second circuit board, low-speed signals transmitted between a plurality of I/O modules and an IC chip, and then transmits the combined low-speed signals to the IC chip by using a low-speed cable. A low-speed signal sent by the IC chip to the plurality of I/O modules is extended to a plurality of low-speed signals on the second circuit board, and then the plurality of low-speed signals are separately sent to the plurality of I/O modules. This may be applied to a scenario in which a relatively large quantity of electronic components need to be disposed on a circuit board.

Claims (33)

1. A circuit board assembly, comprising:

a first circuit board having an integrated circuit (IC) chip attached to a chip heat sink and a plurality of high-speed connectors installed thereon; and

a second circuit board having a plurality of input/output (I/O) modules and a monitoring module installed thereon, wherein the IC chip is connected to the monitoring module using a low-speed cable, and the monitoring module is connected to the plurality of I/O modules using a plurality of first intra-board cables of the second circuit board,

wherein the monitoring module is configured to:

extend a first low-speed signal received from the low-speed cable into a first set of low-speed signals and send the first set of low-speed signals to the plurality of I/O modules, and

combine a second set of low-speed signals from the plurality of I/O modules into a second low-speed signal and send the second low-speed signal to the IC chip using the low-speed cable, wherein each I/O module is connected to one of the high-speed connectors using a high-speed cable, each high-speed connector is connected to the IC chip using a first intra-board cable of the first circuit board, the plurality of high-speed connectors and the IC chip are located on a surface on a same side of the first circuit board, and some or all of the plurality of high-speed connectors and the IC chip are disposed in a projection area of the chip heat sink on the first circuit board.

2. The circuit board assembly according to claim 1 , comprising:

a first low-speed connector disposed on the first circuit board; and

a second low-speed connector disposed on the second circuit board and connected to the first low-speed connector using the low-speed cable, wherein the first low-speed connector is connected to the IC chip using a second intra-board cable of the first circuit board, the second low-speed connector is connected to the monitoring module by using a second intra-board cable of the second circuit board.

3. The circuit board assembly according to claim 1 , wherein a cable-side connector is disposed at an end of the high-speed cable to cooperate with a tail end of each I/O module, a signal pin is disposed at a bottom of the cable-side connector and connected to a third intra-board cable of the second circuit board,

wherein conductive terminals in the cable-side connector comprise a first group of terminals to transmit a high-speed signal and a second group of terminals to transmit a low-speed signal, ends of the first group of terminals are connected to the I/O module or an optical module in the I/O module, and the other ends of the first group of terminals are connected to a conducting wire in the high-speed cable; and ends of the second group of terminals are connected to the I/O module or an optical module in the I/O module, and the other ends of the second group of terminals are connected to the signal pin.

4. The circuit board assembly according to claim 1 , wherein the plurality of I/O modules are separately installed on a front side and a rear side of the second circuit board.

5. The circuit board assembly according to claim 4 , wherein a plane parallel to the front side of the second circuit board is used as a reference plane, a plane parallel to the rear side of the second circuit board is used as a reference plane, or a plane perpendicular to a thickness direction of the second circuit board is used as a reference plane, and wherein projections of areas in which the I/O modules are installed on both front and rear sides of a same part of the second circuit board on the reference plane overlap or mostly overlap.

6. The circuit board assembly according to claim 1 , wherein each high-speed connector of the first circuit board is disposed on a rear side of the first circuit board opposite to a side on which the IC chip is located, wherein a plane parallel to a front side of the first circuit board is used as a reference plane, a plane parallel to a rear side of the first circuit board is used as a reference plane, or a plane perpendicular to a thickness direction of the first circuit board is used as the reference plane, and wherein a projection of the high-speed connector on the reference plane partially or completely falls within a projection of the chip heat sink on the reference plane.

7. An electronic device, comprising:

a housing;

a circuit board assembly installed inside the housing, wherein

the circuit board assembly comprises:

a first circuit board having an IC (integrated circuit) chip attached to a chip heat sink and a plurality of high-speed connectors installed thereon, and

a second circuit board having a plurality of input/output (I/O) modules and a monitoring module installed thereon, wherein the IC chip is connected to the monitoring module using a low-speed cable, and the monitoring module is connected to the plurality of I/O modules by using a plurality of first intra-board cables of the second circuit board,

wherein the monitoring module is configured to:

extend a first low-speed signal received from the low-speed cable into a first set of low-speed signals and correspondingly send the first set of low-speed signals to the plurality of I/O modules, and

combine a second set of low-speed signals received from the plurality of I/O modules into a second low-speed signal and send the second low-speed signal to the IC chip using the low-speed cable,

wherein each I/O module is connected to one of the high-speed connectors using a high-speed cable, the high-speed connector is connected to the IC chip by using a first intra-board cable of the first circuit board, the plurality of high-speed connectors and the IC chip are located on a surface on a same side of the first circuit board, and some or all of the plurality of high-speed connectors and the IC chip are disposed in a projection area of the chip heat sink on the first circuit board; and

a heat dissipation apparatus to dissipate heat for the circuit board assembly.

8. The electronic device according to claim 7 , further comprising:

a first low-speed connector disposed on the first circuit board; and

a second low-speed connector disposed on the second circuit board, wherein the first low-speed connector is connected to the second low-speed connector using the low-speed cable, the first low-speed connector is connected to the IC chip using a second intra-board cable of the first circuit board, and the second low-speed connector is connected to the monitoring module using a second intra-board cable of the second circuit board.

9. The electronic device according to claim 7 , wherein a cable-side connector is disposed at an end of the high-speed cable to cooperate with a tail end of each I/O module, a signal pin is disposed at a bottom of the cable-side connector, the signal pin is installed on the second circuit board and is connected to a third intra-board cable of the second circuit board,

wherein conductive terminals in the cable-side connector comprise a first group of terminals to transmit a high-speed signal and a second group of terminals to transmit a low-speed signal, wherein ends of the first group of terminals are connected to the I/O module or an optical module in the I/O module, and the other ends of the first group of terminals are connected to a conducting wire in the high-speed cable, and wherein ends of the second group of terminals are connected to the I/O module or an optical module in the I/O module, and the other ends of the second group of terminals are connected to the signal pin.

10. The circuit board assembly according to claim 7 , wherein the plurality of I/O modules are separately installed on a front side and a rear side of the second circuit board.

11. The electronic device according to claim 10 , wherein a plane parallel to the front side of the second circuit board is used as a reference plane, a plane parallel to the rear side of the second circuit board is used as a reference plane, or a plane perpendicular to a thickness direction of the second circuit board is used as a reference plane, and wherein projections of areas in which the I/O modules are installed on both front and rear sides of a same part of the second circuit board on the reference plane overlap or mostly overlap.

12. The electronic device according to claim 7 , wherein each high-speed connector of the first circuit board is disposed on a rear side of the first circuit board opposite to a side on which the IC chip is located, wherein a plane parallel to a front side of the first circuit board is used as a reference plane, a plane parallel to a rear side of the first circuit board is used as a reference plane, or a plane perpendicular to a thickness direction of the first circuit board is used as the reference plane, and wherein a projection of the high-speed connector on the reference plane partially or completely falls within a projection of the chip heat sink on the reference plane.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2021
From: DENG, CHAOJUN; MA, FEI; FANG, WEI; YANG, ZHIWEN; LI, CHUNGANG; HAO, SHUN
To: HUAWEI TECHNOLOGIES CO., LTD.
Reel/Frame 057503/0507 →
Priority Claims (1)
CN 201810809693.7 · Jul 23, 2018 · national
Continuity (2)
Continuation PCTCN2019095588 · Jul 11, 2019
Related Publication 20210212193A1 · Jul 8, 2021
Cited By (1)
US 12,322,886