Through-silicon via for high-speed interconnects
A device includes a semiconductor substrate having first and second surfaces facing one another, and multiple through-silicon vias (TSVs). The TSVs are formed through the substrate between the first and second surfaces, at least a first TSV of the TSVs includes: (i) an electrically conductive interconnect, which is formed within the first TSV and is configured to conduct an electrical signal between the first and second surfaces, and (ii) an attenuation layer, which is formed within the first TSV, between the substrate and the electrically conductive interconnect, the attenuation layer configured to attenuate interference between electrical signals carried by two or more of the TSVs.
1. A device, comprising:
a semiconductor substrate having first and second surfaces facing one another; and
multiple through-silicon vias (TSVs) formed through the substrate between the first and second surfaces, the multiple TSVs comprising:
one or more first TSVs, comprising (i) an electrically conductive interconnect, which is formed within the first TSVs and is configured to conduct first electrical signals between the first and second surfaces, and (ii) an attenuation layer, which is formed of a material deposited within the first TSVs, between the substrate and the electrically conductive interconnect, the attenuation layer configured to attenuate interference between electrical signals carried by two or more of the TSVs; and
one or more second TSVs that are separate from the first TSVs, wherein the second TSVs (i) comprise the electrically conductive interconnect for conducting second electrical signals between the first and second surfaces, (ii) do not have the attenuation layer, and (iii) have a barrier layer configured to prevent diffusion between the substrate and the electrically conductive interconnect.
2. The device according to claim 1 , wherein the attenuation layer comprises a dielectric layer having a dielectric constant smaller than 2.9.
3. The device according to claim 1 , wherein the attenuation layer comprises a dielectric layer having a thickness greater than 50 nm.
4. The device according to claim 1 , wherein the one or more second TSVs are configured to conduct second signals, different from the first signals.
5. The device according to claim 1 , wherein at least one of the first TSVs is positioned between two or more of the second TSVs.
6. The device according to claim 1 , wherein the attenuation layer and the barrier layer differ in thickness from one another.
7. The device according to claim 1 , wherein the attenuation layer and the barrier layer differ in dielectric constant from one another.
8. The device according to claim 1 , wherein the attenuation layer and the barrier layer differ in material composition from one another.
9. The device according to claim 1 , wherein at least one of the first TSVs and at least one of the second TSVs differ in diameter from one another.
10. The device according to claim 9 , wherein the first TSVs are larger in diameter than the second TSVs.
11. The device according to claim 4 , wherein the first TSVs are configured to carry data signals, and wherein at least some of the second TSVs are configured to carry direct current (DC) signals.
12. The device according to claim 1 , wherein the interference comprises electrical-signal coupling between the electrical signals carried by two or more of the TSVs.
13. A method for producing a device, the method comprising:
forming, through a substrate having first and second surfaces facing one another, multiple through-silicon vias (TSVs);
forming within one or more first TSVs among the TSVs:
an electrically conductive interconnect for conducting first electrical signals between the first and second surfaces, and
an attenuation layer, which is formed of a material deposited between the substrate and the electrically conductive interconnect, for attenuating interference between electrical signals carried by two or more of the TSVs; and
forming within one or more second TSVs among the TSVs, which are separate from the first TSVs, the electrically conductive interconnect for conducting second electrical signals between the first and second surfaces, and a barrier layer for preventing diffusion between the substrate and the electrically conductive interconnect, but not the attenuation layer.
14. The method according to claim 13 , wherein forming the attenuation layer comprises forming a dielectric layer having a dielectric constant smaller than 2.9.
15. The method according to claim 13 , wherein forming the attenuation layer comprises forming a dielectric layer having a thickness greater than 50 nm.
16. The method according to claim 13 , wherein forming the one or more first and second TSVs comprises positioning at least one of the first TSVs between two or more of the second TSVs.
17. The method according to claim 13 , wherein forming the one or more first and second TSVs comprises forming the attenuation layer and the barrier layer to differ in thickness one from the other.
18. The method according to claim 13 , wherein forming the one or more first and second TSVs comprises forming the attenuation layer and the barrier layer to differ in dielectric constant one from the other.
19. The method according to claim 13 , wherein forming the one or more first and second TSVs comprises forming the attenuation layer and the barrier layer to have different material composition one from the other.
20. The method according to claim 13 , wherein forming the one or more first and second TSVs comprises forming at least one of the first TSVs and at least one of the second TSVs to differ in diameter one from the other.
21. The method according to claim 20 , wherein forming the one or more first and second TSVs comprises forming the first TSVs to be larger in diameter than the second TSVs.
22. The method according to claim 13 , wherein attenuating the interference comprises attenuating an electrical-signal coupling between the electrical signals carried by two or more of the TSVs.