Semiconductor devices with backside power rail and method thereof

1. A method comprising:

providing a structure having a substrate, a source feature and a drain feature over the substrate, one or more channel layers connecting the source and the drain features, a gate structure between the source and the drain features and engaging the one or more channel layers, and one or more dielectric layers disposed over the source and the drain features;

forming a source contact hole and a drain contact hole that penetrate through the one or more dielectric layers and expose the source feature and the drain feature respectively;

forming a source contact and a drain contact in the source contact hole and the drain contact hole respectively;

forming an etch mask that covers the drain contact and exposes the source contact;

removing the source contact through the etch mask, thereby reclaiming at least a portion of the source contact hole; and

depositing a first dielectric cap in at least the portion of the source contact hole.

2. The method of claim 1 , further comprising:

forming a source silicide feature between the source feature and the source contact and a drain silicide feature between the drain feature and the drain contact.

3. The method of claim 2 , wherein the removing of the source contact also removes at least a portion of the source silicide feature.

4. The method of claim 1 , further comprising:

before the forming of the etch mask, partially recessing the drain contact, thereby reclaiming a portion of the drain contact hole; and

depositing a second dielectric cap in the portion of the drain contact hole.

5. The method of claim 1 , further comprising:

forming a first interconnect structure over the first dielectric cap; and

forming a via under the source feature and electrically connected to the source feature.

6. The method of claim 5 , further comprising:

forming a power rail under the via and electrically connected to the via.

7. A method comprising:

providing a structure having a substrate, first and second source/drain features over the substrate, one or more channel layers connecting the first and the second source/drain features, a high-k metal gate between the first and the second source/drain features and engaging the one or more channel layers, and one or more dielectric layers disposed over the first and the second source/drain features;

forming first and second contacts that go through the one or more dielectric layers and electrically connected to the first and the second source/drain features respectively;

forming an etch mask that exposes the first contact and covers the second contact;

removing the first contact through the etch mask, resulting in a first trench over the first source/drain feature;

depositing a first dielectric cap in the first trench;

forming a first via over the second contact and electrically connected to the second contact; and

forming a first interconnect structure over the first via and electrically connected to the first via, wherein the first dielectric cap isolates the first source/drain feature from the first interconnect structure.

8. The method of claim 7 , before the forming of the first and the second contacts, further comprising:

forming a first silicide feature between the first contact and the first source/drain feature and a second silicide feature between the second contact and the second source/drain feature.

9. The method of claim 8 , wherein the removing of the first contact also removes at least a portion of the first silicide feature.

10. The method of claim 7 , before the forming of the etch mask, further comprising:

partially recessing the second contact, resulting in a second trench over the second contact; and

forming a second dielectric cap in the second trench, wherein the first via penetrates through the second dielectric cap.

11. The method of claim 10 , wherein the first and the second dielectric caps include different materials.

12. The method of claim 7 , further comprising:

forming a second via under the first source/drain feature and electrically connected to the first source/drain feature.

13. The method of claim 12 , further comprising:

forming a second interconnect structure under the second via and electrically connected to the second via.

14. A method comprising:

providing a structure having a substrate, a source region and a drain region over the substrate, one or more channel layers connecting the source region and the drain region, a gate structure engaging the one or more channel layers, and one or more dielectric layers disposed over the source and the drain regions;

forming a source contact and a drain contact that penetrate through the one or more dielectric layers and connect to the source region and the drain region, respectively;

forming an etch mask that exposes a first one of the source and the drain contacts and covers a second one of the source and the drain contacts;

removing the first one of the source and the drain contacts through the etch mask, thereby forming a first hole in the one or more dielectric layers; and

depositing a first dielectric cap in the first hole.

15. The method of claim 14 , before the forming of the etch mask, further comprising:

partially recessing the second one of the source and the drain contacts, resulting in a second hole in the one or more dielectric layers; and

forming a second dielectric cap in the second hole.

16. The method of claim 15 , wherein the first dielectric cap and the second dielectric cap include different materials.

17. The method of claim 15 , further comprising:

forming a via that penetrates through the second dielectric cap and electrically connects to the second one of the source and the drain contacts.

18. The method of claim 17 , further comprising:

forming an interconnect structure over the via and electrically connected to the via.

19. The method of claim 14 , further comprising:

forming a via under the source and the drain regions, wherein one of the source and the drain regions is disposed vertically between the via and the first dielectric cap, and the one of the source and the drain regions is electrically connected to the via.

20. The method of claim 19 , further comprising:

forming an interconnect structure under the via and electrically connected to the via.