IP Library Granted Patent US 12,074,149
Granted Patent B2
US 12,074,149 · App. 17/168,251 · Granted Aug 27, 2024

Device packages with uniform components and methods of forming the same

Inventors: Michael E. Watts (Scottsdale, AZ); James Krehbiel (Chandler, AZ); Mario Bokatius (Chandler, AZ)
Assignee: MACOM Technology Solutions Holdings, Inc.
H01L25/16H01L23/367H01L23/66H01L24/48H01L2223/6655H01L2224/48137H01L2224/48175H01L2924/1033H01L2924/13064H01L2924/1421H01L2924/19105H01L2924/30111
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Quick Facts
Patent No.
US 12,074,149
App. No.
17/168,251
Granted
Aug 27, 2024
Kind
B2
Abstract

A semiconductor device package includes a first and a second input lead and a plurality of uniform transistor-based components, the plurality of uniform transistor-based components comprising a first subset of the uniform transistor-based components coupled to the first input lead and a second subset of the uniform transistor-based components coupled to the second input lead. The first subset and the second subset are arranged in an asymmetric configuration with respect to one another.

Claims (48)

1. A semiconductor device package comprising:

a first and a second input lead;

a first and a second output lead; and

a plurality of uniform transistor-based components, the plurality of uniform transistor-based components comprising a first subset including one or more first uniform transistor-based components coupled to the first input lead, and a second subset including one or more second uniform transistor-based components coupled to the second input lead,

wherein the first input lead and the first output lead define a first amplifier path therebetween,

wherein the second input lead and the second output lead define a second amplifier path therebetween,

wherein the first amplifier path and the second amplifier path are asymmetric with respect to one another, and

wherein each of the one or more first and second uniform transistor-based components respectively comprises a same matching device that is distinct from a transistor thereof and includes a first integrated passive device (IPD) circuit, wherein the first IPD circuit comprises a main element and a tunable element that is configured to be selectively connected to the main element to alter an impedance of the first IPD circuit to provide one of a first impedance and a second impedance that is different from the first impedance.

2. The semiconductor device package of claim 1 , wherein the first uniform transistor-based components are coupled to the first input lead by one or more bondwires configured to deliver a first input power level to the first subset, and

wherein the second uniform transistor-based components are coupled to the second input lead by one or more bondwires configured to deliver a second input power level to the second subset.

3. The semiconductor device package of claim 2 , wherein the first input power level is different than the second input power level.

4. The semiconductor device package of claim 1 , wherein the transistor of each of the first and second uniform transistor-based components comprises a same first transistor die.

5. The semiconductor device package of claim 4 , wherein the first transistor die is a Group III nitride-based transistor amplifier.

6. The semiconductor device package of claim 1 , wherein a first sum of gate peripheries of transistors of the first amplifier path is different than a second sum of gate peripheries of transistors of the second amplifier path.

7. The semiconductor device package of claim 1 , wherein the main element and the tunable element each comprise a capacitive device, and

wherein the tunable element is configured to increase a capacitance of the first IPD circuit through connection to the main element.

8. The semiconductor device package of claim 1 , wherein the first IPD circuit comprises a plurality of IPD circuits.

9. The semiconductor device package of claim 8 , wherein the plurality of IPD circuits comprises a second IPD circuit that is electrically connected between the first input lead and a transistor die of the first uniform transistor-based components, and

a third IPD circuit that is electrically connected between the first input lead and the second IPD circuit.

10. The semiconductor device package of claim 1 , wherein the first IPD circuit of each of the first uniform transistor-based components is configurable to provide a same impedance as the first IPD circuit of each of the second uniform transistor-based components.

11. The semiconductor device package of claim 1 , wherein the first amplifier path consists of the first subset coupled between the first input lead and the first output lead, and the second amplifier path consists of the second subset coupled between the second input lead and the second output lead.

12. A semiconductor device package comprising:

a first and a second input lead;

a first and a second output lead;

a plurality of transistor dies, the plurality of transistor dies comprising a first subset including one or more first transistor dies coupled to the first input lead, and a second subset including one or more second transistor dies coupled to the second input lead; and

a plurality of uniform integrated passive device (IPD) circuits respectively comprising a same matching device, wherein the same matching device comprises a main element and a tunable element that is configured to be selectively connected to the main element to alter a configuration of a respective one of the uniform IPD circuits to provide one of a first impedance and a second impedance that is different from the first impedance,

wherein the first input lead and the first output lead define a first amplifier path therebetween,

wherein the second input lead and the second output lead define a second amplifier path therebetween,

wherein a first subset of the plurality of uniform IPD circuits is connected to the one or more first transistor dies,

wherein a second subset of the plurality of uniform IPD circuits is connected to the one or more second transistor dies, and

wherein the first amplifier path is selectively configured differently than the second amplifier path.

13. The semiconductor device package of claim 12 , wherein the main element and the tunable element each comprise a capacitive device, and

wherein the tunable element is configured to be selectively connected to the main element to increase a capacitance of the respective one of the uniform IPD circuits.

14. The semiconductor device package of claim 12 , wherein each of the first subset and the second subset of the plurality of transistor dies comprises a same transistor die.

15. The semiconductor device package of claim 12 , wherein a first sum of gate peripheries of the first subset of the plurality of transistor dies of the first amplifier path is different than a second sum of gate peripheries of the second subset of the plurality of transistor dies of the second amplifier path.

16. A semiconductor device package comprising:

a plurality of input leads;

a plurality of output leads; and

a plurality of uniform transistor-based components, comprising:

a first subset comprising first uniform transistor-based components that are electrically connected between a first input lead of the input leads and a first output lead of the output leads, wherein the first input lead and the first output lead define a first amplifier path therebetween; and

a second subset comprising second uniform transistor-based components that are electrically connected between a second input lead of the input leads and a second output lead of the output leads, wherein the second input lead and the second output lead define a second amplifier path therebetween,

wherein each of the plurality of uniform transistor-based components respectively comprises a transistor die and a same matching device that is distinct from the transistor die and includes an integrated passive device (IPD) circuit,

wherein a first number of the first uniform transistor-based components of the first amplifier path is different than a second number of the second uniform transistor-based components of the second amplifier path, and

wherein the IPD circuit of each of the plurality of uniform transistor-based components comprises a main element and a tunable element that is configured to be selectively connected to the main element to alter an impedance of the IPD circuit to provide one of a first impedance and a second impedance that is different from the first impedance.

17. The semiconductor device package of claim 16 , wherein the main element and the tunable element each comprise a capacitive device, and

wherein the tunable element is configured to be connected to the main element to increase a capacitance of the IPD circuit.

18. The semiconductor device package of claim 16 , wherein the IPD circuit of each of the first uniform transistor-based components is a plurality of IPD circuits.

19. The semiconductor device package of claim 18 , wherein each IPD circuit of the plurality of uniform transistor-based components is a same IPD circuit.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2023
From: WOLFSPEED, INC.
To: MACOM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
Reel/Frame 066236/0086 →
CHANGE OF NAME Recorded Jan 20, 2022
From: CREE, INC.
To: WOLFSPEED, INC.
Reel/Frame 058785/0440 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2021
From: WATTS, MICHAEL E.; KREHBIEL, JAMES; BOKATIUS, MARIO
To: CREE, INC.
Reel/Frame 055542/0214 →
Continuity (1)
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