IP Library › Granted Patent US 11,501,838
Granted Patent B2
US 11,501,838 · App. 17/171,486 · Granted Nov 15, 2022

Preread and read threshold voltage optimization

Inventors: Seungjune Jeon (Santa Clara, CA); Zhenming Zhou (San Jose, CA); Zhenlei Shen (Milpitas, CA)
Assignee: MICRON TECHNOLOGY, INC.
G11C16/34G06F9/30101G11C16/10G11C16/26G11C29/42
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Quick Facts
Patent No.
US 11,501,838
App. No.
17/171,486
Granted
Nov 15, 2022
Kind
B2
Abstract

A request to read data at the memory device is received. A first read operation is performed to read the data at the memory device using a first read threshold voltage. The data read at the memory device using the first read threshold voltage is determined to be associated with a first unsuccessful correction of an error. Responsive to determining that the data read at the memory device using the first read threshold voltage is associated with the first unsuccessful correction of the error, a second read threshold voltage is stored at a register to replace a preread threshold voltage previously stored at the register that is associated with the memory device. The first preread threshold voltage was previously used to perform a preread operation at the memory device. A second read operation to read the data at the memory device is performed using the second read threshold voltage.

Claims (52)

1. A system comprising:

a memory device; and

a processing device, operatively coupled to the memory device, to:

receive a request to perform a write operation to write first data at the memory device;

perform a preread operation to read second data at the memory device using a first preread threshold voltage that is different than any of a plurality of read threshold voltages; and

perform a write operation that writes a subset of the first data at the memory device based on the preread operation.

2. The system of claim 1 , wherein performing the preread operation further comprises:

determining data values of a first subset of the second data that match data values of a first subset of third data, and data values of a second subset of the second data that differ from data values of a second subset of the third data.

3. The system of claim 2 , wherein performing the write operation further comprises:

maintaining the data values of the first subset of the second data that match the data values of the first subset of the third data.

4. The system of claim 1 , wherein the processing device is further to:

responsive to determining that the first data read at the memory device by a first read operation using the first preread threshold voltage is associated with a first unsuccessful error correction operation, store a second read threshold voltage at a register to replace a first preread threshold voltage previously stored at the register; and

perform a second read operation to read the data at the memory device using the second read threshold voltage.

5. The system of claim 4 , wherein responsive to determining that the first data read at the memory device using the first preread threshold voltage is associated with the first unsuccessful correction of the error, the processing device is further to:

perform a third read operation to read the first data at the memory device using a third read threshold voltage of the plurality of read threshold voltages; and

determine that the first data read at the memory device using the third read threshold voltage is associated with a second unsuccessful error correction operation.

6. The system of claim 1 , wherein the processing device is further to:

perform a second preread operation to read third data at the memory device using a second preread threshold voltage, wherein the second preread threshold voltage is a same threshold voltage as one of the plurality of read threshold voltages and a different threshold voltage than the first preread threshold voltage.

7. The system of claim 6 , wherein the first preread threshold voltage is greater than the second preread threshold voltage.

8. A method comprising:

receiving, by a processing device, a request to perform a write operation to write first data at a memory device;

performing a preread operation to read second data at the memory device using a first preread threshold voltage that is different than any of a plurality of read threshold voltages; and

performing a write operation that writes a subset of the first data at the memory device based on the preread operation.

9. The method of claim 8 , wherein performing the preread operation further comprises:

determining data values of a first subset of the second data that match data values of a first subset of third data, and data values of a second subset of the second data that differ from data values of a second subset of the third data.

10. The method of claim 9 , wherein performing the write operation further comprises:

maintaining the data values of the first subset of the second data that match the data values of the first subset of the third data.

11. The method of claim 8 , further comprising:

responsive to determining that the first data read at the memory device by a first read operation using the first preread threshold voltage is associated with a first unsuccessful error correction operation, storing a second read threshold voltage at a register to replace a first preread threshold voltage previously stored at the register; and

performing a second read operation to read the data at the memory device using the second read threshold voltage.

12. The method of claim 11 , further comprising:

responsive to determining that the first data read at the memory device using the first preread threshold voltage is associated with the first unsuccessful correction of the error, performing a third read operation to read the first data at the memory device using a third read threshold voltage of the plurality of read threshold voltages; and

determining that the first data read at the memory device using the third read threshold voltage is associated with a second unsuccessful error correction operation.

13. The method of claim 8 , further comprising:

performing a second preread operation to read third data at the memory device using a second preread threshold voltage, wherein the second preread threshold voltage is a same threshold voltage as one of the plurality of read threshold voltages and a different threshold voltage than the first preread threshold voltage.

14. The method of claim 13 , wherein the first preread threshold voltage is greater than the second preread threshold voltage.

15. A non-transitory computer-readable storage medium comprising executable instructions that, when executed by a processing device, cause the processing device to:

receive a request to perform a write operation to write first data at a memory device;

perform a preread operation to read second data at the memory device using a first preread threshold voltage that is different than any of a plurality of read threshold voltages; and

perform a write operation that writes a subset of the first data at the memory device based on the preread operation.

16. The non-transitory computer-readable storage medium of claim 15 , wherein performing the preread operation further comprises:

determining data values of a first subset of the second data that match data values of a first subset of third data, and data values of a second subset of the second data that differ from data values of a second subset of the third data.

17. The non-transitory computer-readable storage medium of claim 16 , wherein performing the write operation further comprises:

maintaining the data values of the first subset of the second data that match the data values of the first subset of the third data.

18. The non-transitory computer-readable storage medium of claim 15 , further comprising executable instructions that, when executed by the processing device, cause the processing device to:

responsive to determining that the first data read at the memory device by a first read operation using the first preread threshold voltage is associated with a first unsuccessful error correction operation, store a second read threshold voltage at a register to replace a first preread threshold voltage previously stored at the register; and

perform a second read operation to read the data at the memory device using the second read threshold voltage.

19. The non-transitory computer-readable storage medium of claim 18 , further comprising executable instructions that, when executed by the processing device, cause the processing device to:

responsive to determining that the first data read at the memory device using the first preread threshold voltage is associated with the first unsuccessful correction of the error, perform a third read operation to read the first data at the memory device using a third read threshold voltage of the plurality of read threshold voltages; and

determine that the first data read at the memory device using the third read threshold voltage is associated with a second unsuccessful error correction operation.

20. The non-transitory computer-readable storage medium of claim 15 , further comprising executable instructions that, when executed by the processing device, cause the processing device to:

perform a second preread operation to read third data at the memory device using a second preread threshold voltage, wherein the first preread threshold voltage is greater than the second preread threshold voltage.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 9, 2021
From: JEON, SEUNGJUNE; ZHOU, ZHENMING; SHEN, ZHENLEI
To: MICRON TECHNOLOGY, INC.
Reel/Frame 055201/0459 →
Continuity (2)
Continuation 16715639 · Dec 16, 2019
Related Publication 20210183454A1 · Jun 17, 2021