Electronic device including a gate structure and a process of forming the same

1. An electronic device comprising:

a gate structure including:

a gate electrode including a doped semiconductor material;

a first metal-containing member overlying the gate electrode and including a first metal nitride material;

a second metal-containing member overlying the first metal-containing member, wherein the second metal-containing member has a first side and a second side opposite the first side;

a third metal-containing member covering an upper surface of the second metal-containing member, wherein the third metal-containing member includes a second metal nitride material;

a first conductive sidewall spacer overlying the gate electrode and adjacent to the first side of the second metal-containing member, wherein the first conductive sidewall spacer includes a third metal nitride material; and

a second conductive sidewall spacer overlying the gate electrode and adjacent to the second side of the second metal-containing member, wherein the second conductive sidewall spacer includes a fourth metal nitride material.

2. The electronic device of claim 1 , wherein at least 90% of an area of an upper surface of the gate electrode is covered by a combination of the second metal-containing member, the first conductive sidewall spacer, and the second conductive sidewall spacer.

3. The electronic device of claim 1 , further comprising a gate interconnect, wherein the gate interconnect contacts the gate structure.

4. The electronic device of claim 1 , further comprising:

a channel layer;

a barrier layer disposed between the channel layer and the gate electrode;

a drain electrode overlying the channel layer and contacting the barrier layer; and

a source electrode overlying the channel layer and contacting the barrier layer,

wherein:

the gate electrode includes p-type doped GaN,

the second metal-containing member includes at least 90 wt % Al or at least 90 wt % Cu,

the first metal-containing member includes TiN, and

each of the first conductive sidewall spacer and the second conductive sidewall spacer includes TiN.

5. The electronic device of claim 1 , wherein:

the first conductive sidewall spacer has a first arcuate surface, and

the second conductive sidewall spacer has a second arcuate surface.

6. An electronic device comprising a high electron mobility transistor, wherein the high electron mobility transistor comprises:

a gate structure that includes:

a gate electrode including p-type doped GaN having a surface along a (002) crystal plane;

a first metal-containing member overlying the gate electrode and having a thickness in a range from 5 nm to 99 nm; and

a second metal-containing member overlying the rust metal-containing member,

wherein:

the first metal-containing member has a first surface in contact with the surface of the gate electrode and a second surface in contact with the second metal-containing member,

the first metal-containing member includes:

TiN, wherein at least 80% of areas of each of the first and second surfaces is along a (111) crystal plane, or

Ti, wherein at least 80% of areas of each of the first and second surfaces is along a (002) crystal plane,

the second metal-containing member includes Al and at least 80% of an area of a surface in contact with the first metal-containing member is along a (111) crystal plane,

the gate electrode has a first length,

the second metal-containing member has a second length, and

the first metal-containing member has a third length that is greater than the second length, and the third length is no more than 10% different from the length.

7. The electronic device of claim 6 , wherein, for a 0.6 micron×0.6 micron area, the gate electrode has an upper surface with an Rq of at most 2.0 nm or Rmax of at most 10 nm.

8. The electronic device of claim 6 , wherein the gate structure further comprises a third metal-containing member and covering an upper surface of the second metal-containing member.

9. The electronic device of claim 6 , further comprising a first conductive sidewall spacer and a second conductive sidewall spacer, wherein:

the first conductive sidewall spacer overlies the gate electrode and lies along a first side of the second metal-containing member, and

the second conductive sidewall spacer overlies the gate electrode and lies along a second side of the second metal-containing member, wherein the second side is opposite the first side.

10. The electronic device of claim 6 , wherein the high electron mobility transistor further comprises:

a channel layer;

a barrier layer disposed between the channel layer and the gate electrode;

a drain electrode overlying the channel layer and contacting the barrier layer; and

a source electrode overlying the channel layer and contacting the barrier layer.

11. The electronic device of claim 6 , the gate structure further comprises:

a first sidewall spacer overlying the gate electrode and the first metal-containing member; and

a second sidewall spacer overlying the gate electrode and the first metal-containing member, wherein the second metal-conducting member is disposed between the first sidewall spacer and the second sidewall spacer.

12. A process of forming an electronic device comprising:

forming a gate electrode layer over a barrier layer;

forming a first metal-containing layer over the gate electrode layer;

patterning to the first metal-containing layer to form a first metal-containing member having a first side and a second side opposite the first side;

forming a second metal-containing layer over the first metal-containing member and along the rust side and the second side of the first metal-containing member,

removing a portion of the second metal-containing layer to form at least one second metal-containing member, and

removing portions of the gate electrode layer to form a gate electrode,

wherein:

a gate structure for a transistor structure includes the gate electrode, the first metal-containing member, and the at least one second metal-containing member, and

each of the gate electrode, the first metal-containing member, and the at least one second metal-containing member is conductive.

13. The process of claim 12 , wherein removing the portion of the second metal-containing layer forms a rust sidewall spacer along the first side of the first metal-containing member and a second sidewall spacer along the second side of the second metal-containing member.

14. The process of claim 13 , further comprising:

forming a third metal-containing layer over the gate electrode layer and before forming the first metal-containing layer, wherein, for a 0.6 micron×0.6 micron area, the gate electrode layer has an exposed surface with an Rq of at most 2.0 nm or Rmax of at most 10 nm; and

removing portions of the third metal-containing layer that are not covered by the first metal-containing member, the first sidewall spacer, or the second sidewall spacer to form a third metal-containing member, wherein the gate structure further includes the third metal-containing member.

15. The process of claim 14 , wherein the third metal-containing layer includes (1) TiN and has a surface along a (111) crystal plane or (2) Ti and has a surface along a (002) crystal plane, and a surface of the third metal-containing layer is in contact a surface of the gate electrode layer that include p-type doped GaN, wherein the surface of the gate electrode layer is along a (002) crystal plane.

16. The process of claim 12 , further comprising forming a passivation layer over the gate structure and an exposed portion of the barrier layer before forming a silicon dioxide film over the barrier layer.

17. The process of claim 12 , further comprising a source electrode and a drain electrode, wherein the gate structure, the source electrode, and the drain electrode are parts of a high electron mobility transistor.